Wait states changed to 3, same effect. Also sometimes I got error when reloading program: Cortex_M4_0: Error occurred during flash operation: Timed out waiting for target to halt while executing pwrite_en.alg Cortex_M4_0: Error occurred during flash operation: Timed out waiting for target to halt while executing pwrite_en.alg Cortex_M4_0: Error occurred during flash operation: Timed out waiting for target to halt while executing pwrite_en.alg Cortex_M4_0: Error occurred during flash operation: Timed out waiting for target to halt while executing pwrite_en.alg Cortex_M4_0: Trouble Removing Breakpoint with the Action "Remain Halted" at 0x20004118: (Error -2044 @ 0x96) Internal error: Requested breakpoint does not exist. Restart the application. If error persists, please report the error. (Emulation package 20.0.0.3178) Cortex_M4_0: Error occurred during flash operation: Timed out waiting for target to halt while executing erasew.alg Cortex_M4_0: Flash Programmer: Error erasing Sector 1. Operation Cancelled (1). Cortex_M4_0: File Loader: Memory write failed: Unknown error Cortex_M4_0: GEL: File: C:\WorkspaceECOM\CD_CM\Debug\CD_CM.out: Load failed. Cortex_M4_0: Error occurred during flash operation: Timed out waiting for target to halt while executing pwrite_en.alg Cortex_M4_0: Error occurred during flash operation: Timed out waiting for target to halt while executing pwrite_en.alg Cortex_M4_0: Trouble Removing Breakpoint with the Action "Remain Halted" at 0x20004118: (Error -2044 @ 0x96) Internal error: Requested breakpoint does not exist. Restart the application. If error persists, please report the error. (Emulation package 20.0.0.3178) But second relead (Ctrl-Alt-R) passes. I will try to comment out code now.
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Forum Post: RE: TMS320F28386S: Debugging the NMI on CM core issue
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Forum Post: RE: MCU-PLUS-SDK-AM243X: enet_icssg_tcpserver example has an issue with ping test.
Hi Jinwon Jang, I tried to recreate the issue, but I am not able to observe the dropped packets issue with the example without any modifications. Can you share more details related to the network configuration, that is, the IP addresses used for the interfaces, the Gateway and Netmask used for the corresponding interfaces? I was not able to observe any packet drops because of the memory placement. Can you please confirm if there are no changes to the default example, from any of the components? Thanks and regards, Teja.
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Forum Post: RE: MSP430FR2155: Setting up BSL in I2C mode from Application code
I figured out one issue. It was jumping to NMI_ISR() from bootloader. I use external oscillator on my setup. So I disabled oscillator fault interrupt and cleared flag before jumping to BSL. It seems that now it stays in BSL, and I do get some responses when trying to communicated, but then it stucks. I disabled all code that initializes peripherals now, and still same issue. Here are code samples: // Stop Watchdog Timer. TODO: implement WDG MAP_WDT_A_hold(WDT_A_BASE); MAP_GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P1, (GPIO_PIN_ALL8 & ~(GPIO_PIN0 + GPIO_PIN1 + GPIO_PIN2 + GPIO_PIN3))); MAP_GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P2, GPIO_PIN_ALL8); MAP_GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P3, GPIO_PIN_ALL8); MAP_GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P4, GPIO_PIN_ALL8); MAP_GPIO_setAsOutputPin(GPIO_PORT_PJ, GPIO_PIN_ALL8); MAP_GPIO_setOutputLowOnPin(GPIO_PORT_PJ, GPIO_PIN_ALL8); // UART RX and TX lines (P4.2 & P4.3) // Disable UART module before setting these pins as outputs if UART is not used MAP_GPIO_setAsOutputPin(GPIO_PORT_P4, GPIO_PIN2 + GPIO_PIN3); MAP_GPIO_setOutputLowOnPin(GPIO_PORT_P4, GPIO_PIN2 + GPIO_PIN3); clock_init(); LOG_DEBUG_INIT(); /* * Disable the GPIO power-on default high-impedance mode to activate * previously configured port settings */ MAP_PMM_unlockLPM5(); __enable_interrupt(); while (1) { next_state = ctl_process(); // Doesn't go furter for this example Code for clock_init: /** * Initializes clock sources for the device. * Uses an external clock source for ACLK and DCO for SMCLK and MCLK. */ static void clock_init(void) { // Configure Pins for XIN and XOUT //Set P2.6 and P2.7 as Module Function Input. MAP_GPIO_setAsPeripheralModuleFunctionInputPin( GPIO_PORT_P2, GPIO_PIN6 + GPIO_PIN7, GPIO_SECONDARY_MODULE_FUNCTION ); //Initializes the XT1 crystal oscillator with no timeout //In case of failure, code hangs here. //For time-out instead of code hang use CS_turnOnXT1LFWithTimeout() MAP_CS_turnOnXT1LF(CS_XT1_DRIVE_0); // Initialize the external clock source MAP_CS_setExternalClockSource(XT1CLK_FREQUENCY); // Set the ACLK to use the external clock source (XT1CLK) MAP_CS_initClockSignal(CS_ACLK, CS_XT1CLK_SELECT, CS_CLOCK_DIVIDER_1); // Below settings for different clock speed // //Set DCO FLL reference = REFO // CS_initClockSignal( // CS_FLLREF, // CS_XT1CLK_SELECT, // CS_CLOCK_DIVIDER_1 // ); // CS_initFLL(CS_MCLK_DESIRED_FREQUENCY_IN_KHZ, CS_MCLK_FLLREF_RATIO); //clear all OSC fault flag MAP_CS_clearAllOscFlagsWithTimeout(1000); //Enable oscillator fault interrupt MAP_SFR_enableInterrupt(SFR_OSCILLATOR_FAULT_INTERRUPT); // Set SMCLK = DCO with frequency divider of 1 MAP_CS_initClockSignal(CS_SMCLK, CS_DCOCLKDIV_SELECT, CS_CLOCK_DIVIDER_1); // Set MCLK = DCO with frequency divider of 1 MAP_CS_initClockSignal(CS_MCLK, CS_DCOCLKDIV_SELECT, CS_CLOCK_DIVIDER_1); } Code for ctl_process(): ctl_process_result_t ctl_process(void) { ctl_process_result_t process_result = CTL_PROCESS_NEXT; switch (current_state) { case INIT: // sc_start(); current_state++; break; case OPERATING: LOG_INFO_MSG("OPERATING"); // process_operating(); if (current_state == OPERATING) { // sc_stop(); // Turn off ADC // dpt_ctl_deinit(); // Deinitialize the dpt control __disable_interrupt(); // disable interrupts MAP_SFR_disableInterrupt(SFR_OSCILLATOR_FAULT_INTERRUPT); MAP_CS_clearAllOscFlagsWithTimeout(1000); DELAY_MS(5); ((void (*)())0x1000)(); // jump to BSL } using BSL with following command: C:\ti\BSL-Scripter\BSL-Scripter.exe -d -i [COM10,I2C,100000] -n FRxx -b .\ScriptExampleWindows\FRxx_i2c\pass32_default.txt Verbose is turned on! Device : FRxx Init communication parameters : [COM10,I2C,100000] RX_PASSWORD .\ScriptExampleWindows\FRxx_i2c\pass32_default.txt Read Txt File : C:\ti\BSL-Scripter\ScriptExampleWindows/FRxx_i2c/pass32_default.txt [80] [21] [00] [11] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [ff] [9e] [e6] PS C:\ti\BSL-Scripter> It should respond with ERROR: Wrong password. I2C behaviour from LA: NACK behaviour zoomed in:
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Forum Post: RE: AM263P4-Q1: AM263P4-Q1
Hii Shaunak, I didn't got any error. But should a warning(Attached the pic). I am using the same system config and MCU+SDK .
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Forum Post: RE: AM263P4-Q1: AM263P4-Q1
Even I am checking the voltage levels at the pin 1 (374mv)and 15(454mv) of U54 .
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Forum Post: RE: TMS320F280049C: Issues Injecting Data Errors for ECC Testing on F28004x
Thank you!
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Forum Post: RE: MSP430F5638: Getting a USB CDC example running on the 5638 - Redux
Hi Ted, I'll close the thread. feel free to reply the thread or file a new one if you have further question. B.R. Sal
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Forum Post: RE: AM2434: UART DMA Configuration Error
Hello Hideaki, Please try the SOC command is am243x instead of am64x and see if this works or not. gamke is the correct command. Regards, Anil.
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Forum Post: RE: AM263P4-Q1: Unable to Establish Detection for 10BASE-T
Hi Shaunak, Thanks for the reply and also for checking with the PHY team. Q1: The link partner is DP83869HMRGZR. Do you need additional details here? Q2: I have asked the customer to provide the PHY register dump and will update once they send me the log. Best regards, Mari Tsunoda
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Forum Post: RE: MCU-PLUS-SDK-AM243X: High interrupt latency
Hi Maor, Thanks for the follow-up. Regarding the FreeRTOS overhead contributing to the ~2 µs latency, yes, a portion of that latency may stem from the RTOS, especially if you’re calling FreeRTOS APIs within the ISR. These FreeRTOS operations may not be trivial and can take hundreds of cycles depending on CPU frequency and interrupt nesting. In general, I was referring to the fact that on optimizing the R5F code, the latency between the 2 signals you are observing can be reduced. Do let me know if there is a consistent latency between the 2 signal taps even after doing the above optimizations. Regards, Aaron
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Forum Post: RE: AM263P4-Q1: Sysconfig Warning After Update
Hi Nilabh, Thanks for the reply. I have asked them to ensure the cliargs and Sysconfig version are matching here in the sysconfig file so the pop up does not show up. Best regards, Mari Tsunoda
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Forum Post: RE: AM263P4: When the SWAP feature is enabled ,How can I use Flash operation APIs (Flash_read, Flash_write, etc.) in region A to manipulate data physically located in region B (e.g., at 0x60500000)?
Hello，After activating the SWAP mechanism , we intend to configure the memory range 0x400000 - 0x481000 as a shared region accessible to both Partition A and Partition B. This design accounts for Partition B's bootloader starting at 0x481000 . Note that a Secondary Bootloader (SBL) in Partition B is not required.
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Forum Post: RE: MSP430G2533: MSP430G2533
Hi Jojo, Thank you for your response. I appreciate the confirmation that it is possible to access the peripheral registers through the Bootstrap Loader (BSL) on the MSP430G2533 after the JTAG fuse is blown. I am now interested in understanding whether the FlashPro 430 can be utilized for this purpose. Specifically, can FlashPro 430 be used to facilitate BSL communication to access the peripheral registers on the MSP430G2533? If this is possible, could you please provide guidance or documentation on the setup and process involved? Thank you for your assistance. Best regards, Kevin.
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Forum Post: RE: AM2434: EtherCAT Multi-Node Connection Issue with AM2434 and DP83822
Okay so 0xE00 aligns to previous finding that only Port0 of Station 1 is identified and port1 of Station 2 remains closed, thereby not detecting any other Stations in the daisy chain. Can you also make sure all the required hardware connections mentioned in Hardware Requirements are present in your device. Regards, Aaron
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Forum Post: RE: TMS320F28386S: Debugging the NMI on CM core issue
So, commenting out the code removes the issue. So, the code is as follows: I have the const resource table in externally generated file. The record is defined as typedef struct { char name[256]; int id; int offset; int size; int stype; int width; int height; } EVEMAP; Table: const EVEMAP edfmap[] = { {"default-fl.blob", 0, 0, 4096, 0, 0, 0}, {"NotoSansMono-VariableFont.glyph", 1, 4096, 24320, 0, 0, 0}, {"verdana.glyph", 2, 28416, 36480, 0, 0, 0}, {"NotoSansMono-VariableFont.xfont", 3, 64896, 311, 0, 0, 0}, {"NotoSansMono-VariableFont.xfont.padding", 4, 65207, 9, 0, 0, 0}, {"verdana.xfont", 5, 65216, 311, 0, 0, 0}, {"verdana.xfont.padding", 6, 65527, 9, 0, 0, 0}, {"LED-fail.raw", 7, 65536, 256, 37815, 32, 32}, {"LED-off.raw", 8, 65792, 256, 37815, 32, 32}, {"LED-on.raw", 9, 66048, 256, 37815, 32, 32}, {"advion.raw", 10, 66304, 8640, 37815, 480, 72}, {"back-icon.raw", 11, 74944, 256, 37815, 32, 32}, {"bs-icon.raw", 12, 75200, 256, 37815, 32, 32}, {"cancel-icon.raw", 13, 75456, 256, 37815, 32, 32}, {"ecom-logo.raw", 14, 75712, 8640, 37815, 480, 72}, {"eth.raw", 15, 84352, 256, 37815, 32, 32}, {"expand-icon.raw", 16, 84608, 144, 37815, 24, 24}, {"expand-icon.raw.padding", 17, 84752, 48, 0, 0, 0}, {"gilson.raw", 18, 84800, 8640, 37815, 480, 72}, {"home-icon.raw", 19, 93440, 256, 37815, 32, 32}, {"io-icon.raw", 20, 93696, 256, 37815, 32, 32}, {"lcprocess.raw", 21, 93952, 8640, 37815, 480, 72}, {"leak-icon.raw", 22, 102592, 256, 37815, 32, 32}, {"left-icon.raw", 23, 102848, 256, 37815, 32, 32}, {"lilichro.raw", 24, 103104, 8640, 37815, 480, 72}, {"menu-icon.raw", 25, 111744, 256, 37815, 32, 32}, {"okay-icon.raw", 26, 112000, 256, 37815, 32, 32}, {"remote-icon.raw", 27, 112256, 256, 37815, 32, 32}, {"right-icon.raw", 28, 112512, 256, 37815, 32, 32}, {"semba.raw", 29, 112768, 8640, 37815, 480, 72}, {"shift-icon.raw", 30, 121408, 256, 37815, 32, 32}, {"shrink-icon.raw", 31, 121664, 144, 37815, 24, 24}, {"shrink-icon.raw.padding", 32, 121808, 48, 0, 0, 0}, {"welch-logo.raw", 33, 121856, 8640, 37815, 480, 72}, {"wufeng.raw", 34, 130496, 8640, 37815, 480, 72}, {"xenon-off.raw", 35, 139136, 256, 37815, 32, 32}, {"xenon-on.raw", 36, 139392, 256, 37815, 32, 32}, {"zivak.raw", 37, 139648, 8640, 37815, 480, 72}, {"zoomall-icom.raw", 38, 148288, 144, 37815, 24, 24}, {"zoomall-icom.raw.padding", 39, 148432, 48, 0, 0, 0}, {"version.txt", 42, 148544, 40, 0, 0, 0}, {"version.txt.padding", 43, 148584, 24, 0, 0, 0}, {""}}; And NMI is catched in the resource find routine: EVEMAP *findEDFObject(const char *name) { int i = 0; while(edfmap[i].name[0]) { if(strcmp(edfmap[i].name, name) == 0) // <- NMI { return edfmap + i; } i++; } return 0; } Or here: EVEMAP *flashBitmapById(uint16_t id) { return edfmap + 5; int i = 0; while(edfmap[i].name[0]) { if(edfmap[i].id == id) // <- NMI { Cmd_SetBitmap(RAM_FLASH + edfmap[i].offset / 32, edfmap[i].stype, edfmap[i].width, edfmap[i].height); return edfmap + i; } i++; } return 0; }
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Forum Post: RE: TMDSCNCD28P55X: Problem in running usb examples
Hello Siddharth, yes I tried all the drivers and also with different versions of the C2000 library, but the issue is always the same. When only the debug USB is connected, the code runs. When I connect the second USB port it is not recognized, all the USB ports are disconnected (even my mouse) and the device manager goes on refreshing. The only way to stop this refreshing is to connect the second USB to the PC through a USB hub: in this case the device is detected but it is not enumerated, so the PC can not connect. I found this on the release notes (see image) , but you wrote that the example is working on your control card, so I don't understand if this may be the issue. Thank you,Ilaria
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Forum Post: RE: AM2434: Providing custom MAC address to TI's CPSW driver
Hi Toby Grabham, I suggest to enable custom board option, and enable the necessary changes for the custom board, so that you can remove this dependency from the code. You can find the documentation to enable the custom board can be found here: https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/latest/exports/docs/api_guide_am64x/enet_migration_guide_top.html#CustomBoardSupport Then, you can implement the read function for MAC addresses in the function "EnetBoard_getMacAddrList" in your custom board_config.c to read MAC addresses from Flash memory. Please reach out to us if you need any further assistance on this. Thanks and regards, Teja.
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Forum Post: RE: MSPM0L1304: I want to use the SWCLK-Pin as an GPIO.
Hello Jojo, I have solved the problem. I fixed another internal error on my part, then the project ran. The “Debug Enable On SWD Pins” is deactivated. The following syntax runs: void SYSCFG_DL_DEBUG_init(void){ #ifdef DEBUG_MODE delay_cycles(500000000); #endif SYSCTL->SOCLOCK.SWDCFG = (SYSCTL_SWDCFG_KEY_VALUE | SYSCTL_SWDCFG_DISABLE_TRUE); } int main(void) { SYSCFG_DL_init(); if (DL_GPIO_readPins(BTN_PORT, BTN_DI_SWITCH_PIN)){ DL_GPIO_initDigitalOutput(IOMUX_PINCM21); DL_GPIO_enableOutput(GPIOA, DL_GPIO_PIN_20); DL_GPIO_clearPins(GPIOA, DL_GPIO_PIN_20); } while(1){ } No pull-down had to be set to "None". Many thanks for your help!
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Forum Post: RE: TMS320F28P550SJ: LAUNCHXL-F28P55X (Rev A) JTAG/SCI Boot Mode Connection Issues - "Unable to access device register
Hi Matt, Thank you for your prompt response and the suggested solution regarding the target configuration files. I have followed your advice and confirmed that I am using the TMS320F28P550SJ9_LaunchPad.ccxml file located in C2000Ware_5_04_00_00\device_support\f28p55x\common\targetConfigs\ as you recommended. Furthermore, I have made the necessary modification on line 21 of this .ccxml file. However, I am still encountering the "Unable to access device register" error. Interestingly, the JTAG connection test within CCS (Code Composer Studio) reports a successful scan-test, as shown in the attached screenshot. Despite this successful test, when I attempt to connect to the target or load code, the same error message persists. I've attached three images for your reference: LAUNCHXL-F28P55X Board Image: A photo of my LAUNCHXL-F28P55X (Rev A) board. CCS Connection Test Screenshot: This screenshot shows the successful JTAG connection test and the simultaneous error message. CCS Debug Output Screenshot: This screenshot shows the error message in the debug output window while attempting to connect or load code, confirming the .ccxml file in use. Could you please provide further guidance on what might be causing this discrepancy between the successful JTAG test and the persistent connection error? Thank you for your continued support. Best regards, Yas Kaba
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Forum Post: RE: TMS320F28P550SG: UniFlash 9.1.0: CPU Reset via -r0 not working on TMS320F28P550SG8PZ with XDS200
Thanks for confirming. The reset definitely occurs, it just the behavior of the device after the reset. I will bring this thread to the attention of the device experts for further comment. Thanks ki
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