Part Number: AM2434 Other Parts Discussed in Thread: SYSCONFIG Tool/software: Hi everyone, I’m trying to determine whether a DDR4 SDRAM device can be connected to the AM2434LVX. I noticed that SysConfig 1.22 doesn’t provide this option. Could you clarify if this configuration is supported? Thanks, Baruch
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Forum Post: AM2434: AM2434
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Forum Post: RE: TMS570LS1224: Many inputs undeterminded at ADC Self-Test
Hi Timon, [quote userid="542934" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1475596/tms570ls1224-many-inputs-undeterminded-at-adc-self-test"]we have a problem with the self test of the mentioned controller, see table below. My understanding to get a good result is: Vu>Vn>Vd, is this right?[/quote] Your understanding is correct, and this should be the basic condition that should satisfy and here is the actual comparison for good result. [quote userid="542934" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1475596/tms570ls1224-many-inputs-undeterminded-at-adc-self-test"]Any ideas, where the rootcause of these results can be? Too much capacitance at input when getting Vn=0?[/quote] I didn't know exact root cause for this issue, I am doing further analysis to find root cause. -- Thanks & regards, Jagadish.
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Forum Post: AM2434: OSPI READ COMMAND first bit half-level question.
Part Number: AM2434 Other Parts Discussed in Thread: SYSCONFIG Tool/software: Hi expert, (AM243X + S28HL512T) We tested the waveform when reading memory from flash in 8D mode, and found that the high level of DQs pins does not reach VDD at the first data bit, as show in the below picture. Corresponding to the following mark . We think it may be due to this config value. Through ospi_flash_diag project, we can read out dummyClksRd = 24 from flash chip, it is exactly one clock less that sysconfig value. The host delayed a CLK release the DQs pins resulting in a half-level? And we tried to modify to 26, and found that with one more CLK half-level, as show in the below picture. Than we tried to modify to 24, but found that can't read correctly value from flash. Now we would like to ask whether our conjecture is correct, and how to eliminate this half-level issue?.
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Forum Post: RE: TMDS243EVM: How to add a Internet configure in Sysconfig based on INDUSTRIAL COMMUNICATION SDK?
Hi, [quote userid="624520" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1471507/tmds243evm-how-to-add-a-internet-configure-in-sysconfig-based-on-industrial-communication-sdk/5669677#5669677"]Could you give me a right choice based on TMDS243EVM? that way, [/quote] You can drop down the conflict pin and select pin not used by other IP/instance. Do you need RGMII1 and RGMII2 as per my understanding of your use case, it should be CPSW-RGMII ICSSG1-Port-1-RMII ICSSG1-Port-2-RMII (+) [FAQ] What Ethernet pinmux combinations are valid on AM64x processors? - Processors forum - Processors - TI E2E support forums Regards Ashwani
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Forum Post: RE: LP-AM261: Example for using memcpy to read from external flash
Hi Dheeraj, Apologies for the delay. Sorry, looks like I gave path to am263px mcu_plus_sdk instead of AM261x Correct Path: C:\ti\mcu_plus_sdk_am261x_10_00_01_10\examples\drivers\ospi\ospi_flash_io Also, Please add the below attached sysconfig file in this path C:\ti\mcu_plus_sdk_am261x_10_00_01_10\source\sysconfig\board\.meta\flash e2e.ti.com/.../IS25WX064.json Also , in the flash_am261x.syscfg file ensure that defaultFlashConfigLP and getDefaultFlashName else part has IS25WX064 flash as input. Once these steps are done import the ospi_flash_io example and verify that seeing the default value of Flash in example.sysconfig file in ospi_flash_io example. Regards, Rijohn
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Forum Post: RE: MCU-PLUS-SDK-AM243X: DP83826E LEDCFG Register Errata leading to incorrect ethphy_dp83826e.c
Thank you Steve for the details. We'll analyze it and get back. Regards, Aaron
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Forum Post: MSPM0G3507-Q1: Repeated input pin damage (shorted to VDD)
Part Number: MSPM0G3507-Q1 Tool/software: Hi, I would like to ask for your help with an issue we've been dealing with for a while now. Many of our regulator units died during testing (sometimes simply while laying on a table with nothing connected to them, apart from power and CAN bus). Brief device description: Electric water heater regulator, communicating over CAN bus. 2 PT100 temperature sensors, a flowmeter and a 3-phase triac regulator are connected to the device via a screw terminal block. The common factor among all of the cases seems to be that after the unit gets destroyed, VDD and pin PA25 are connected to ground via a low impedance inside the MCU - most of the time it's not a dead short (10s of ohms), but VDD and PA25 are virtually shorted together. This leads me to believe, that one of the protective diodes on the pin is destroyed. I tried testing the pin with mild electrostatic discharges, but this had no effect. Connecting 24 V to the pin resulted in it shorting to VDD, essentially simulating the above mentioned state. This pin is used as an input to the ADC and is a part of a 4 - 20 mA current loop, sensing the output of the flowmeter. The issue sometimes happens even when there's nothing connected to the terminal (FLOWMETER_OUT in the schematic). I plan to test it with a more powerful static discharge tomorrow, but apart from that, I'm running out of ideas what could be the cause of this problem. Is there any possibility, that a misconfigured pin can lead to a situation like this? e2e.ti.com/.../main_5F00_syscfg.zip
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Forum Post: RE: TMS320F28388D: InstaSPIN-FOC/FAST Estimator Usage on F2838
The F2838x doesn't have the InstaSPIN ROM, so it can't run any example lab with InstaSPIN in motorWare.
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Forum Post: RE: MCU-PLUS-SDK-AM243X: EtherCAT Error Counters
Hi Aaron, we will also create some wireshark logs on our side and will provide them. Thanks for the clarification already!
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Forum Post: RE: C2000WARE-MOTORCONTROL-SDK: Is runRsOnLine needed for project that only does motor ID?
If you just want to spin or identify the motor simply, you don't need Rs online and Rs re-calculation that is disabled by default.
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Forum Post: RE: BQ41Z50EVM: Disabling the dataflash permanent fail
Hello, Flashing the device didn't fix the issue, when flashing the device the error "A read of data written failed comparison" was displayed again
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Forum Post: RE: MSPM0G3507-Q1: Repeated input pin damage (shorted to VDD)
Is there a relay or something up stream in the current loop? I would suspect a transient. This thread has a lot of good ideas https://e2e.ti.com/support/microcontrollers/msp-low-power-microcontrollers-group/msp430/f/msp-low-power-microcontroller-forum/1472205/msp430f5438a-uart_esd_protection
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Forum Post: RE: AM2434: AM243x
Update: I removed sync1 shift time. Indeed sync0 and sync1 now happens at the same time and at the same frequency. I wish to the fix in the next release of TI SDK.
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Forum Post: RE: TM4C129ENCZAD: Unable to clear General Purpose Timers to zero.
Have you tried my code as is? When I single step through my code I could clearly see the TAR updated with the value from TAV. Why don't you do the same? Can you compare your code to my code? I'm not sure if you run into a race condition where you are writing a new value to TAV at the same time the counter is incrementing to the next value. The incremented value may have overwritten the value you wrote. For example, the current TAV is 1234 and next increment value will be 1235. If you write a zero, it may be overwritten with 1235 in the next cycle. This is just a thought. Why don't you try to disable the timer before writing 0 to TAV?
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Forum Post: RE: MSP430FR2476: Low Power mode
I get the same result with TA0CCR1=30 (which doesn't surprise me much). I made a mistake before; with CCR1=30 I do see 2mA. I'll see if I can figure out something. I encourage you to try EnergyTrace (Debugger: "Tools->EnergyTrace" then "Run->Free Run") since it provides much more dynamic information than an ammeter. [Edit Noted new mystery.]
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Forum Post: RE: AM263P4-Q1: Automatic Retransmission After Arbitration Loss
Mari, The customer should set MCAN_InitParams::darEnable to 0 in order for a packet to try and re-transmit until it is sucessfully transmitted. According to the AM263P4 Technical Reference Manual, this is the default setting on the device: However, you should still set this in SW. Regards, Brennan
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Forum Post: AM2634-Q1: AM263xB/C SDK
Part Number: AM2634-Q1 Other Parts Discussed in Thread: AM2634 Tool/software: Hi, do I need a dedicated SDK when using AM2634B and AM2634C? Regards, Holger
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Forum Post: MSP430F4152: FLL+ seems to not lock, FLASH Information memory field download error
Part Number: MSP430F4152 Tool/software: Dear All, I would like to ask some support regarding two problems: 1. FLL+ does not lock and not produce desired (1,504MHz) MCLK. I forced P1.1 to add out MCLK and it is only 310KHz! If "FN_x' DCO range adjusted this value changes: ~600K, ~900K etc. It seems the DCO oscillates at its lowest frequency and DCOF flag always '1'. I use VLO as ACLK (FLL+ input reference) clock generator. Note, ACLK is OK (LCD working). My FLL+ configuration (screenshot taken from code editor), after RESET: 2. I cannot download FLASH program (using BSLDEMO2.exe + RS232 interface) due to a mass erase issue at 01000H. I can download only the code if I remove the constants located in ~1000H field. Embedded constant table definition in my code: I used this technique succesfully with 'F1222, 'F415 etc parts but it sems does not work with 'F4152 (due to maybe BSL version 1.61?): Is it possible to define somehow initial constants (~table) in the information memory area? Thank you in advance! Joseph
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Forum Post: RE: AM2434: Test tool on Ethercat, Profinet, Ethernet IP
hello Prajith: do you have the equivalent links documenting the same 3 industrial comms busses but for AM64x ?? thanks Jim
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Forum Post: RE: MSPM0G3507: Configuration for max ADC throughput
3/4 a) can you please look into this more? it doesn't make sense to have a fifo where the only way to use it is to try to read until you underflow or wait until it overflows. b) the fifo for DAC has interrupts at a configurable level which would work as well, is this available for the ADC? c) how big is the ADC fifo? d) If i can't use the fifo directly, then i have to do the DMA, i see there is an example, but what i would need to know is what happens with the fifo when a DMA is complete. for example if the fifo was 8 deep and the DMA was set to 16, when i get the dma complete interrupt, lets say i queue up a process to deal with the new data. i go to move the dma destination to a new location and enable the dma again, but by this time 2 ADC samples have occurred, did they overwrite anything in the existing buffer? are they lost? are they waiting in the fifo? and will transfer as soon as the DMA is re enabled?
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