Hi Zhen, Thank you for doing additional tests and sharing the results. Have you modified the phase shift values from what is shown in the example? [quote userid="521369" url="~/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1498214/tms320f280039c-questions-about-the-epwm_ex3_synchronization-routine/5766343#5766343"]But why is interrupt and SYNCOUT generated only when TBCTR is 0 for the second time?[/quote] Let me replicate this issue on my setup. As I previously suggested, the EPWM could be looking for a transition edge of when TBCTR=0 for it to take the corresponding actions. I will need to discuss with some colleagues if this is case and what is happening here. I will get back to you as soon as possible. Best Regards, Marlyn
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