Hi Vignesh, I realized I never properly answered your original question. If the ADCINT is set up as a trigger source for a DMA channel, it does not need to go through the CPU. This trigger is connected directly to the DMA in hardware if enabled. The ADC interrupt and DMA trigger while using the same conditional flag, should not affect each other/cause issues. Likely what you are seeing is a delay in when the PWM ISR is being serviced. If both the PWM interrupt and the ADC interrupt are sent to the PIE at the same time, the PIE will service the ADC interrupt first since it has a higher priority in the table, see below: In this case, I would recommend keeping the ADC ISR as short as possible. What is the desired behavior? Do you want the PWM ISR to be serviced first? If so, you would need to implement interrupt nesting which is much more complex. Best Regards, Delaney
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