Hi Ben, Thanks again for your clarification earlier regarding the simultaneous sampling mode. Based on the description in the TRM, I understand that when simultaneous sampling is enabled (e.g., SIMULEN0 = 1 ), the sample-and-hold (S&H) for ADCINA0 and ADCINB0 occurs at the same time , but the conversions are performed sequentially — first A0, then B0. Given this, I expected that if the same voltage is applied to both ADCINA0 and ADCINB0 , the digital results from ADCRESULT0 and ADCRESULT1 should be nearly identical. To verify this, I conducted a small experiment: I connected ADCINA0 and ADCINB0 to the same power supply output (as shown in the first image). I placed a breakpoint in the EOC1 interrupt to observe the ADC results (shown in the second image). I captured results at different voltage levels and compared the ideal digital value with the actual results from ADCINA0 and ADCINB0 (see the table below). Here are some key results from the test: Test No. PSU Voltage Ideal Digital Value ADC Digital Value Error ADCINA0 ADCINB0 ADCINA0 ADCINB0 1 0.5 620 598 610 3.6% 1.7% 2 0.5 620 686 701 -10.6% -13.0% 3 0.5 620 637 623 -2.7% -0.4% 4 1 1241 1273 1280 -2.6% -3.2% 5 1 1241 1309 1318 -5.5% -6.2% 6 1 1241 1280 1257 -3.2% -1.3% 7 2 2482 2502 2474 -0.8% 0.3% 8 2 2482 2480 2459 0.1% 0.9% 9 2 2482 2517 2498 -1.4% -0.7% As you can see, even though both ADC pins were tied together, the ADC results from A0 and B0 were not equal, and in some cases, the error from the ideal value was over 10% , which seems too high. My Questions: Is it normal to see this much variation between ADCINA0 and ADCINB0 in simultaneous sampling mode when both inputs are physically tied together? Is there anything else I should check to verify the accuracy or calibration of simultaneous sampling in this setup? (For reference, I have already performed both Device_cal and AdcOffsetSelfCal() provided by TI.) Any insights or suggestions would be greatly appreciated. Thanks again for your help! Best regards, JangHoon Kim
↧
