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Forum Post: RE: TMS320F2800157: RAM ECC Test

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Thank you for the answer, In the following steps: 1. Walk through an M0 RAM location until every bit has had a single-bit error injected into it. 2. Walk through a M0 RAM location until every ECC bit for the lower 16 bits (bits 6:0) has had an error injected into it. 3. Walk through a M0 RAM location until every ECC bit for the upper 16 bits (bits 14:8) has had an error injected into it. Why you did the test on Data in one-shot, but the test on ECC bits in 2 phases one phase from 0:6bits and another one from 8:14bits?

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