Hi Hari It is a bit difficult for me to recreate since we don't have the full AUTOSAR stack. Just testing at layer-2 does not show me this issue when I send 50,000 packet intervals of 10ms. This is because the L2 driver will process all the packets in the same way. For timing and EthTrcv configurations, you can refer the out of box Eth demo. I tested with the same. I can help with CPSW related debug pointers but im not sure about the TCP/IP debug from the AutoSAR stack point of view. 1. To check if the DMA status, you can check "0x52834024" to get the DMA status. If it is "80000000" it means it is in idle state. If any other value, it will indicate that the DMA is blocked. 2. Check CPSW stats for Drops and Overruns (after you have sent all your packets in sequence and not getting response from the board). Do this after sending all the packets in the sequence you mentioned previously. 3. Check the FIFO queue for drops: 0x5283A04C (Tx SOF overrun), 0x5283A08C(Rx bottom of FIFO drop) (both should be zero) 4. Are there any logs or debug stats in the TCP/IP implementation of the AutoSAR stack? I recommend checking that as well once. Regards, Shaunak
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