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Forum Post: RE: CCS/RM48L952: debug stop at b prefetchEntry

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Hello, When a prefetch abort occurs, the CPU marks the prefetched instruction as invalid, and all the p-aborts are precise abort. Please check the value in the link register (r14_pabt) to determine which instruction generated the abort. You can also use the CP15_Instruction_Fault_address register (CCS-->registers-->CP15) to determine which instruction causes the abort: See more information about the IFAR on page 133 of the Cortex-R4F TRM revision r1p3.

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