I'll try writing to the register and check if it works. But One More thing to add to this is the register is also Not mentioned in C2000Ware/driverlib of f28004x
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Forum Post: RE: TMS320F280049C: ADC-to-DAC loopback check
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Forum Post: TMS320F280039C: Safety Intergrity Check
Part Number: TMS320F280039C Hello, Is there any way for DSP to detect incorrect clock frequency and over voltage of the voltage rails(VDDIO,VDDA & VDD) against a threshold value?
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Forum Post: TMS320F280039C: CLA and CPU arbitration
Part Number: TMS320F280039C Hi Team below are two questions for CLA and CPU memory access: 1. 0039C TRM 7.3.2 describes if CLA access to the same location that CPU is processing read-modify-write, the CLA write will be ignored, but if CLA requests "read", will the data before CPU write or data after CPU write can CLA read? 2. Same question as question 1 for Message RAM. 3. I compare 0049 TRM there is no the same description, what's the detail rule of 0049? Thanks and best regards Joe 10th May
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Forum Post: RE: AM2434: EDS FILE MODIFICATION FOR AB PLC communcication
Hi Yash, From your description I understood that you are trying to use the Generic Device Profile EthernetIP example. I checked with our EthernetIP Stack Expert and got some suggestions from his side regarding this. If you want to change the type for cyclic IO's from USINT to DINT, it's not enough to just change that in EDS file. You’d also need to change the application side of Generic Device example too. Our actual example supports several types already now on Class 70, Instance 1: 64 USINT attributes (Attribute ID 0x300 - 0x33F) 32 UINT attributes (Attribute ID 0x340 - 0x35F) 16 UDINT attributes (Attribute ID 0x360 - 0x36F) 8 ULINT attributes (Attribute ID 0x370 - 0x377) Actually, just first 5 USINT attributes (ID 0x300 - 0x304) are mapped by Assembly object as inputs and other 5 USINT attributes (ID 0x308 - 0x30C) are mapped as outputs by Assembly object. The Assembly mapping is done in EI_APP_GENERIC_DEVICE_cipSetup function in app_generic_device.c file. To change that you need to update the EI_APP_GENERIC_DEVICE_cipGenerateContent function in app_generic_device.c file and add after this line: uint16_t attribID = 0x300; the following code: // 16 DINT (int32_t). for (i = 0; i < 16; i++) { EI_API_CIP_SAttr_t attr; OSAL_MEMORY_memset(&attr, 0, sizeof(attr)); attr.id = attribID; attr.edt = EI_API_CIP_eEDT_DINT; attr.accessRule = EI_API_CIP_eAR_GET_AND_SET; attr.pvValue = &i; EI_API_CIP_addInstanceAttr(cipNode, classId, instanceId, &attr); EI_API_CIP_setInstanceAttr(cipNode, classId, instanceId, &attr); attribID++; } This will add new 16 DINT attributes to position of previous 64 USINT attributes. Then class 70, instance 1 will look like this: 16 DINT attributes (Attribute ID 0x300 - 0x30F) 64 USINT attributes (Attribute ID 0x310 - 0x34F) 32 UINT attributes (Attribute ID 0x350 - 0x36F) 16 UDINT attributes (Attribute ID 0x370 - 0x37F) 8 ULINT attributes (Attribute ID 0x380 - 0x387) With such a change you don’t need to change mapping inside Assembly object. The EDS file needs to be changed correspondingly - at least the "data type" and "data size in bytes" under each input and output parameter. Regards Archit Dev
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Forum Post: RE: LP-AM243: MCSPI communication with PCI11400 bridge
Hello Gennadii, Thanks for your response. Please allow me some more time to look into this and provide a response as I am in full day trainings. Regards, Vaibhav
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Forum Post: RE: MSPM0L1306: VREF+ pin input impedance and ADC measurements
Hi Randy, I will be better if you choose the VREF with the 3.3V, even if is just connected to VDD- > I assume this is what you are trying to do. [quote userid="17211" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1359707/mspm0l1306-vref-pin-input-impedance-and-adc-measurements"]But I don't know what bias current goes into this pin (and how it might vary over time or ADC operation). I'd need this info to choose the R value in my RC filter.[/quote] I don't think there will be a high inuput bias current, due to the VREF+ will be directly used by ADC as the reference, it won't need to driver internal VREF module: A decoupling capacitor is better for external reference: I do not know what is a proper vaule for 3.3V input, while I suggest you can try with 1uf, and check if it need to increase to get better reference performance. -> This capacitor should be as closed as VREF+ and VREF-/Vss pin. While, you can add some RC filter circuit near the boost output. The maximum leak current on the pin is 100nA, maybe you can take this for design reference: B.R. Sal
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Forum Post: RE: MSPM0L1306: Using timer - pwm as communication frame, need suggestions
Hi Hang, Thanks for the feedback, I will close the thread then. If you have further question, you can file a new thread in the forum. B.R. Sal
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Forum Post: RE: MSPM0L1303: MSPM0L read back flash in stop0 mode
Hi Fabio, Thanks for the feedback. I will ask team experts to check what happened with XDS110 when it read flash back from stop0 mode. B.R. Sal
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Forum Post: RE: TMS320F280049: CLB simulation
Hello Omer I have the same problem as Hamidreza I have implemented a simple coutner that generates a Match1 signal every 120 clocks and resets the counter. The design runs on the controller without any problems and I can measure the Match1 signal with the oscilloscope. In the simulation the counter doesn't count, it only counts if I install an inverter in the feedback of Match1 then everything is ok, but this implementation no longer runs on the controller in the real world The examples in C2000Ware_5_02_00_00 have the same problem I work with CCS 12.7 and the tools from SPRUIR8B - APRIL 2020 - REVISED JULY 2023 (tdm and gtkwave)
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Forum Post: RE: TMS320F28388D: IDE 8.3 on Win 11 OS
Thank you, that helps.
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Forum Post: RE: TMS320F280037C: Uploading application through debugger when there is a bootloader already installed
Hello Charles, When uploading code through the debugger, you are uploading a .out file to the device, compared to the .txt that the bootloader receives. Yes but in essence the code should be the same right? The files are .cmd files that i modified in osme degree or .asm files used for the initialization device or for the DCSM, The .asm file to configure the DCSM is as follows (I obtained it from sysconfig): ;---------------------------------------------------------------------- ; Zone 1 ;---------------------------------------------------------------------- .sect "dcsm_otp_z1_linkpointer" .retain .long 0x00003FFF .long 0x00003FFF .long 0x00003FFF .sect "dcsm_otp_z1_jlm_enable" .retain .long 0xFFFF000F ;Z1OTP_JLM_ENABLE ;; .sect "dcsm_otp_z1_jtag_pswdh" ;; .retain ;; .long 0x4BFFFFFF ;Z1OTP_JTAGPSWDH0 ;; .long 0x3FFFFFFF ;Z1OTP_JTAGPSWDH1 .sect "dcsm_otp_z1_cmac_key" .retain .long 0x00000000 ;Z1OTP_CMACKEY0 .long 0x00000000 ;Z1OTP_CMACKEY1 .long 0x00000000 ;Z1OTP_CMACKEY2 .long 0x00000000 ;Z1OTP_CMACKEY3 .sect "dcsm_otp_z1_pswdlock" .retain .long 0xFB7FFFFF .sect "dcsm_otp_z1_crclock" .retain .long 0x7FFFFFFF .sect "dcsm_otp_z1_gpreg" .retain .long 0x5AFFFFFF ;Z1OTP_GPREG1 = Z1_BOOTPIN .long 0x5AFFFFff ;Z1OTP_GPREG2 .long 0xFFFFFF03 ;Z1OTP_GPREG3 = Z1OTP_BOOTDEF_LOW .long 0xFFFFFFFF ;Z1OTP_GPREG4 = Z1OTP_BOOTDEF_HIGH .sect "dcsm_zsel_z1" .retain .long 0xFFFFFFFF ;Z1OTP_CSMPSWD0 (LSW of 128-bit password) .long 0x4D7FFFFF ;Z1OTP_CSMPSWD1 .long 0xFFFFFFFF ;Z1OTP_CSMPSWD2 .long 0xFFFFFFFF ;Z1OTP_CSMPSWD3 (MSW of 128-bit password) .long 0xAAAAAAAA ;Z1OTP_GRABSECT1 .long 0xAAAAAAAA ;Z1OTP_GRABSECT2 .long 0xAAAAAAAA ;Z1OTP_GRABSECT3 .long 0x0000AAAA ;Z1OTP_GRABRAM1 .long 0xFFFFFFFF ;Reserved .long 0xFFFFFFFF ;Reserved .long 0xFFFFFFFF ;Z1OTP_EXEONLYSECT1 .long 0x0000FFFF ;Z1OTP_EXEONLYSECT2 .long 0x000000FF ;Z1OTP_EXEONLYRAM1 .long 0xFFFFFFFF ;Reserved .long 0xFFFFFFFF ;Z1OTP_JTAGPSWDL0 .long 0x2BFFFFFF ;Z1OTP_JTAGPSWDL1 ;---------------------------------------------------------------------- ; For code security operation,after development has completed, prior to ; production, all other zone select block locations should be programmed ; to 0x0000 for maximum security. ; If the first zone select block at offset 0x10 is used, the section ; "dcsm_rsvd_z1" can be used to program these locations to 0x0000. ; This code is commented out for development. ; .sect "dcsm_rsvd_z1" ; .loop (1e0h) ; .int 0x0000 ; .endloop ;---------------------------------------------------------------------- ; Zone 2 ;---------------------------------------------------------------------- ;; .sect "dcsm_otp_z2_linkpointer" ;; .retain ;; .long 0x00003FFF ;; .long 0x00003FFF ;; .long 0x00003FFF ;; ;; .sect "dcsm_rsvd_z2" ;; .retain ;; .long 0xFFFFFFFF ;Reserved ;; .sect "dcsm_otp_z2_pswdlock" ;; .retain ;; .long 0x1F7FFFFF ;; ;; .sect "dcsm_otp_z2_crclock" ;; .retain ;; .long 0x3FFFFFFF ;; ;; .sect "dcsm_otp_z2_gpreg" ;; .retain ;; .long 0x5AFF1820 ;Z2OTP_GPREG1 = Z2_BOOTPIN ;; .long 0x5AFFFFff ;Z2OTP_GPREG2 ;; .long 0x00000000 ;Z2OTP_GPREG3 = Z2OTP_BOOTDEF_LOW ;; .long 0xFFFFFFFF ;Z2OTP_GPREG4 = Z2OTP_BOOTDEF_HIGH ;; .sect "dcsm_rsvd1_z2" ;; .retain ;; .long 0xFFFFFFFF ;Reserved ;; .long 0xFFFFFFFF ;Reserved ;; ;; .sect "dcsm_zsel_z2" ;; .retain ;; .long 0xFFFFFFFF ;Z2OTP_CSMPSWD0 (LSW of 128-bit password) ;; .long 0x1F7FFFFF ;Z2OTP_CSMPSWD1 ;; .long 0xFFFFFFFF ;Z2OTP_CSMPSWD2 ;; .long 0xFFFFFFFF ;Z2OTP_CSMPSWD3 (MSW of 128-bit password) ;; ;; .long 0xAAAAAAAA ;Z2OTP_GRABSECT1 ;; .long 0xAAAAAAAA ;Z2OTP_GRABSECT2 ;; .long 0xAAAAAAAA ;Z2OTP_GRABSECT3 ;; .long 0x0000AAAA ;Z2OTP_GRABRAM1 ;; .long 0xFFFFFFFF ;Reserved ;; .long 0xFFFFFFFF ;Reserved ;; ;; .long 0xFFFFFFFF ;Z2OTP_EXEONLYSECT1 ;; .long 0x0000FFFF ;Z2OTP_EXEONLYSECT2 ;; .long 0x000000FF ;Z2OTP_EXEONLYRAM1 ;; .long 0xFFFFFFFF ;Reserved ;; .long 0xFFFFFFFF ;Reserved ;; .long 0xFFFFFFFF ;Reserved ;---------------------------------------------------------------------- ; For code security operation,after development has completed, prior to ; production, all other zone select block locations should be programmed ; to 0x0000 for maximum security. ; If the first zone select block at offset 0x10 is used, the section ; "dcsm_rsvd_z2" can be used to program these locations to 0x0000. ; This code is commented out for development. ; .sect "dcsm_rsvd_z2" ; .loop (1e0h) ; .int 0x0000 ; .endloop ;---------------------------------------------------------------------- ; End of file ;---------------------------------------------------------------------- Therefore, to conclude. The should be no difference between running from debugger and running from flash Regards, David
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Forum Post: TMS320F280023: LIN interrupt priority
Part Number: TMS320F280023 Hi team, In "Table 3-3. PIE Channel Mapping" at TRM, the table mentioned LINA0, LINA1, LINB0, LINB1. But these are not clear for my customer. Are these related to TX/RX settings? or there are other factor they have? Regards, Kotaro Yamashita
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Forum Post: RE: AM2732: AM2732CD flash failed
Hi， I am try flashing and running from 9.2 SDK with pre build images today，but it also failed，and the behavior is consistent. Regards, Zdd
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Forum Post: RE: MSP430AFE221: Can't get "hello world" to link in Code Composer generated project
Hello Sal, Thanks for your reply. I'd really like to get the most simple example working for some test automation that I'm doing for the compiler. I already have a more complicated example project compiling. I want something with just one source file and a simple set of commands to compile and link it. I tried dong them from scratch but I don't know what to put in these cmd files so I thought CCS would generate something usable. I've changed the hello world that CCS generated so that it doesn't even call printf or have any include files. Now I get about 5 less errors and just have one left. Ah - I had set the stack size too big in the IDE. Once I turned that down (to below 0x100), I got no linking error. Thanks for the info - the fact that it was too large had not occurred to me. Cheers Peter
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Forum Post: RE: LAUNCHXL2-570LC43: CAN Communication not working : LAUNCHXL2-570LC43x and SN65HVD230 CAN transceiver
Hello Jagadish, I have uploaded the Halcogen files and the include folders in the same link provided above. Thanks !
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Forum Post: RE: MCU-PLUS-SDK-AM263X: Issues using TSN stack alonside lwip sockets library
Hi Hudson, [quote userid="575350" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1359843/mcu-plus-sdk-am263x-issues-using-tsn-stack-alonside-lwip-sockets-library"]I am finding that there are issues when using TI's tsn stack from the mcu-plus-sdk when an app also includes the lwip sockets library[/quote] This is a valid bug that has been reported to the Networking team and is being tracked ( MCUSDK-13225 ). Right now the TSN stack seems to be re-using a lot of macros and entities as observed and reported by you. [quote userid="575350" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1359843/mcu-plus-sdk-am263x-issues-using-tsn-stack-alonside-lwip-sockets-library"]Are there plans in a future release to support the TSN stack alongside use of the LWIP sockets library? Should we not be attempting to use the library in this way?[/quote] The official fix version is 10.00.00 SDK release (Mid August, 2024). For now, if possible I recommend using other functionality and APIs of the lwIP stack (other than Socket APIs). Regards, Shaunak
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Forum Post: TMS320F280039C: How to understand the Round Robin Arbitration in 3.11.6 in TRM?
Part Number: TMS320F280039C Hi team Customer would to define a shared RAM between CLA and CPU with Table 3-11,and need to check the arbitration. Could you please share more details about figure 3-15 Round Robin Arbitration between CPU and CPU.CLA? what's the priority between CLA R/W and CPU R/W. Thanks and best regards Joe
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Forum Post: RE: MSPM0L1306: Mass erase auto/Factory reset auto on CCS 12.7 on-chip flash plug-in seem to fail?
Dear Sal, I will close this and file another thread on CCS forum.
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Forum Post: RE: TMS570LS1224: timer interrupt
Hi Jagadish, Thanks for reply I try your code but not work. Below is code I tried as per your suggestion but interrupt is coming at every us but I configured the interrupt for 1 sec. int main(void) { /* USER CODE BEGIN (3) */ //INITIALIZE TMS570LS1224 systemInit(); gioInit(); sciInit(); rtiInit() rtiEnableNotification(rtiNOTIFICATION_COMPARE0); /* Enable IRQ - Clear I flag in CPS register */ /* Note: This is usually done by the OS or in an svc dispatcher */ _enable_IRQ(); /* Start RTI Counter Block 0 */ rtiStartCounter(rtiCOUNTER_BLOCK0); while(1); } void rtiNotification( uint32 notification) { printConsole("2nd device OTUT fault--\n"); } Thanks.
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Forum Post: RE: MSP430FR5969: Legacy CCS 6 Project (v4.x.x compiler) Won't Build & Run Correctly with New Tools
Hi Jonathan Maier I think you can try-run the code example www.ti.com/.../SLAC536 on CCS 12 (Mac) to check if the stuck in a ~1.2s reboot loop issue will happen if there is no issue, This code example should be the base (empty project) for this version CCS and compilar. Then, you can consider copying your c code from the old project to the new one Thanks
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