Part Number: TMS570LS1227 Hello I'm using the TMS570 as a SPI slave. I'm using the TG0 (transfer Group 0) in the MibSPI1. The pattern I've used is 1) mibspiSetData 2) mibspiTransfer 3) while (!(mibspiIsTransferComplete(mibspiREG1,0)))); 4) mibspiGetData 5) mibspiREG3->TGINTFLG |= 0x00010000U; Is that correct? Do I need to specify step 5 mibspiREG3->TGINTFLG |= 0x00010000U; in this way? Best regards,
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Forum Post: TMS570LS1227: How to clear the TGINTFLG Flag in MibSPI
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Forum Post: RTOS/TMS320F28069F: Medical RTOS for Piccolo.
Part Number: TMS320F28069F Tool/software: TI-RTOS We have used the C2000 platform for years and would like to continue using that for our medical products. With the increasing level of software compliance to Medical safety standards, we are looking for a compatible RTOS for the Piccolo MCU. I have not been able to find a RTOS for the Piccolo that also meets the safety standards of IEC62304. Please let me know if there are any products out there I should be reviewing. Thanks so much.
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Forum Post: CCS/TMS320F28379D: USB module implementation
Part Number: TMS320F28379D Tool/software: Code Composer Studio Hi. I am working with TMS320F2839D I want to implement USB 2.0 Module via UART. For excersise, which exmple code shuld I study? Please help me SIncerely
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Forum Post: MSP430F149: MSP430F149 A/D convertor problem
Part Number: MSP430F149 Hi, I use MSP430F149 for years with same firmware and everything was OK till now. MCUs from last delivery works, but their A/D convertor show results which are lower than real value of measured voltage is. The difference is same for all new MCUs and it's 150mV lower that real voltage is. As a reference is used the internal voltage reference. Does anybody idea where the problem could be? Is there any change in structure of MCU MSP430F149 ? Firmware, PCB, everything is same, only A/D measure lower voltage realyty is. Many thanks in advance for your help / ideas Kind Regards, Jiri
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Forum Post: EK-TM4C123GXL: Cannot install Tiva Ware drivers in Windows 10
Part Number: EK-TM4C123GXL I just had to upgrade my PC to Windows 10 and am unable to install working Windows drivers. I am trying to update the FW on my board using the LM Flash Programmer tool but cannot connect to the board due to the driver issues. Is there a guide for installing the correct drivers on Windows 10? I see many similar threads but none seem to come to a conclusion. Thanks, Eric
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Forum Post: CCS/TMS570LC4357: (Error -242 @ 0x0) A router subpath could not be accessed
Part Number: TMS570LC4357 Tool/software: Code Composer Studio Hello, I am working with a custom board using the TMS570LC4357 . I've been using this custom board with no issues with one Halcogen project. I revised this project (simply disabling drivers that were not needed for our application code) and tried to program the board using the XDS110 USB debug probe and received the following error: CortexR5: Error connecting to the target: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 8.0.903.2) Dap: Error: (Error -242 @ 0x0) A router subpath could not be accessed. The board configuration file is probably incorrect. (Emulation package 8.0.903.2) I looked further into the connectivity issues, and received the following results when executing the 'Test Connection' utility in the Target Config: [Start: Texas Instruments XDS110 USB Debug Probe] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ C:\Users\j65396\AppData\Local\TEXASI~1\CCS\ ti\1\1\BrdDat\testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 100- or 510-class product. This utility will load the adapter 'jioxds110.dll'. The library build date was 'Nov 21 2018'. The library build time was '00:08:45'. The library package version is '8.0.903.2'. The library component version is '35.35.0.0'. The controller does not use a programmable FPGA. The controller has a version number of '5' (0x00000005). The controller has an insertion length of '0' (0x00000000). This utility will attempt to reset the controller. This utility has successfully reset the controller. -----[Print the reset-command hardware log-file]----------------------------- The scan-path will be reset by toggling the JTAG TRST signal. The controller is the XDS110 with USB interface. The link from controller to target is direct (without cable). The software is configured for XDS110 features. The controller cannot monitor the value on the EMU[0] pin. The controller cannot monitor the value on the EMU[1] pin. The controller cannot control the timing on output pins. The controller cannot control the timing on input pins. The scan-path link-delay has been set to exactly '0' (0x0000). -----[Perform the Integrity scan-test on the JTAG IR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Test 3 Word 20: scanned out 0xFE03E0E2 and scanned in 0x00000002. Test 3 Word 21: scanned out 0xFE03E0E2 and scanned in 0x00000000. Test 3 Word 22: scanned out 0xFE03E0E2 and scanned in 0x00000000. Test 3 Word 23: scanned out 0xFE03E0E2 and scanned in 0x00000000. Test 3 Word 24: scanned out 0xFE03E0E2 and scanned in 0x00000000. Test 3 Word 25: scanned out 0xFE03E0E2 and scanned in 0x00000000. Test 3 Word 26: scanned out 0xFE03E0E2 and scanned in 0x00000000. Test 3 Word 27: scanned out 0xFE03E0E2 and scanned in 0x00000000. The details of the first 8 errors have been provided. The utility will now report only the count of failed tests. Scan tests: 3, skipped: 0, failed: 1 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 2 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 3 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 4 Some of the values were corrupted - 60.4 percent. The JTAG IR Integrity scan-test has failed. -----[Perform the Integrity scan-test on the JTAG DR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Test 3 Word 0: scanned out 0xFE03E0E2 and scanned in 0x7F01F071. Test 3 Word 1: scanned out 0xFE03E0E2 and scanned in 0x7F01F071. Test 3 Word 2: scanned out 0xFE03E0E2 and scanned in 0x7F01F071. Test 3 Word 3: scanned out 0xFE03E0E2 and scanned in 0x7F01F071. Test 3 Word 4: scanned out 0xFE03E0E2 and scanned in 0x7F01F071. Test 3 Word 5: scanned out 0xFE03E0E2 and scanned in 0x7F01F071. Test 3 Word 6: scanned out 0xFE03E0E2 and scanned in 0x7F01F071. Test 3 Word 7: scanned out 0xFE03E0E2 and scanned in 0x7F01F071. The details of the first 8 errors have been provided. The utility will now report only the count of failed tests. Scan tests: 3, skipped: 0, failed: 1 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 2 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 3 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 4 Some of the values were corrupted - 65.6 percent. The JTAG DR Integrity scan-test has failed. [End: Texas Instruments XDS110 USB Debug Probe] These results raised the following questions: 1. What exactly are the JTAG IR/DR integrity scan-tests doing? 2. What are some factors that could cause these tests to fail? After unsuccessfully attempting to program my custom board with my new Halcogen project, I thought that I'd further investigate and test out the new Halcogen settings on my Hercules HDK TMS570LC4357 board. I successfully programmed my HDK board with the new Halcogen project with an XDS100v2 USB debug probe, which raised the following questions: 3. Is the updated halcogen project not causing these connectivity issues? 4. Is there something wrong with my XDS110 debugger probe? I would greatly appreciate any resources that could help me answer my 4 questions above. Thanks, Vicki
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Forum Post: TMS320F28020: What is the voltage requirement for triggering a falling edge external interrupt
Part Number: TMS320F28020 What is the range for V high and V low and fall time to correctly trigger an interrupt XINT?
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Forum Post: RE: TMDSSOLARUINVKIT: TMDSSOLARUINVKIT
If you have resolved the issue please let us know.
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Forum Post: RE: Linux/MSP430FR2512: EVM430 Capmini -demo current consumption drops by 2mA about 3 minutes after power on
Hello Walter, Thanks for sharing the schematic and I will help to generate the code for your ASAP based on your hardware and the wake on touch period you want to 1 sec. Thanks, Yiding
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Forum Post: RE: Compiler/MSP430G2553: CCS/ infoB
So, I have solved my problem by increasing the size of infoC and reducing the size of infoB. Still i don't know why am I not able to write to infoB and infoC at the same time in the header files. Nitish
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Forum Post: RE: CCS/LAUNCHXL-F280049C: Download RAM + FLASH or RAM only
Hi Ozio, Yes I use a piece of the C2000 WARE but it’s my own project (not based on the examples). For the linker: I use the CMD file from C2000 Ware (28004X_generic_ram.cmd) associated to another CMD file to switch some pieces of the code in Flash (Additional_commands_RAM.cmd) Here in attachment you’ll find the MAP file for more details. The goal of this configuration is: Debugged code loaded in FLASH Under debug function in RAM .CINIT in RAM due to possible changes during debug This is interesting when I’m able to download program only in RAM, download in FLASH when new debugged functions are switched in the Flash memory. By this mean, I can gain time because I avoid to erase and program the FLASH memory. When I work fully in FLASH, I found out also I’ve to set the option “Combine Sections during Program Load to increase performance”. Otherwise the .text is split in several parts and there is an error regarding the non-blank memory. Here some code used: in Additional_commands_RAM.cmd SECTIONS { SINTBL : >>RAMM0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0 dclfuncs : >> RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0 DataLogSection : >> RAMLS5 | RAMLS6 | RAMLS7, PAGE = 1 align(2) /* Allocate IQ math areas: */ IQmath : > RAMLS0, PAGE = 0 /* Math Code */ IQmathTables : > FLASH_BANK0_SEC0, PAGE = 0 FLASHlibrary : { *rts2800_fpu32.lib (.text) *SYS_ml.lib (.text) } >> FLASH_BANK0_SEC0 | FLASH_BANK0_SEC1 | FLASH_BANK0_SEC3, PAGE = 0 } and in the 28004X_generic_ram.cmd MEMORY { PAGE 0 : /* BEGIN is used for the "boot to SARAM" bootloader mode */ BEGIN : origin = 0x000000, length = 0x000002 RAMM0 : origin = 0x0000F5, length = 0x00030B RAMLS0 : origin = 0x008000, length = 0x000800 RAMLS1 : origin = 0x008800, length = 0x000800 RAMLS2 : origin = 0x009000, length = 0x000800 RAMLS3 : origin = 0x009800, length = 0x000800 RAMLS4 : origin = 0x00A000, length = 0x000800 RESET : origin = 0x3FFFC0, length = 0x000002 /* Flash sectors: you can use FLASH for program memory when the RAM is filled up*/ /* BANK 0 */ FLASH_BANK0_SEC0 : origin = 0x080000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC1 : origin = 0x081000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC2 : origin = 0x082000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC3 : origin = 0x083000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC4 : origin = 0x084000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC5 : origin = 0x085000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC6 : origin = 0x086000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC7 : origin = 0x087000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC8 : origin = 0x088000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC9 : origin = 0x089000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC10 : origin = 0x08A000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC11 : origin = 0x08B000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC12 : origin = 0x08C000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC13 : origin = 0x08D000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC14 : origin = 0x08E000, length = 0x001000 /* on-chip Flash */ FLASH_BANK0_SEC15 : origin = 0x08F000, length = 0x001000 /* on-chip Flash */ /* BANK 1 */ FLASH_BANK1_SEC0 : origin = 0x090000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC1 : origin = 0x091000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC2 : origin = 0x092000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC3 : origin = 0x093000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC4 : origin = 0x094000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC5 : origin = 0x095000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC6 : origin = 0x096000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC7 : origin = 0x097000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC8 : origin = 0x098000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC9 : origin = 0x099000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC10 : origin = 0x09A000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC11 : origin = 0x09B000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC12 : origin = 0x09C000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC13 : origin = 0x09D000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC14 : origin = 0x09E000, length = 0x001000 /* on-chip Flash */ FLASH_BANK1_SEC15 : origin = 0x09F000, length = 0x001000 /* on-chip Flash */ PAGE 1 : BOOT_RSVD : origin = 0x000002, length = 0x0000F3 /* Part of M0, BOOT rom will use this for stack */ RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ RAMLS5 : origin = 0x00A800, length = 0x000800 RAMLS6 : origin = 0x00B000, length = 0x000800 RAMLS7 : origin = 0x00B800, length = 0x000800 RAMGS0 : origin = 0x00C000, length = 0x002000 RAMGS1 : origin = 0x00E000, length = 0x002000 RAMGS2 : origin = 0x010000, length = 0x002000 RAMGS3 : origin = 0x012000, length = 0x002000 } /*You can arrange the .text, .cinit, .const, .pinit, .switch and .econst to FLASH when RAM is filled up.*/ SECTIONS { codestart : > BEGIN, PAGE = 0 .TI.ramfunc : > RAMM0 PAGE = 0 .text : >>RAMM0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0 .cinit : > RAMM0, PAGE = 0 .pinit : > RAMM0, PAGE = 0 .switch : > RAMM0, PAGE = 0 .cio : > RAMLS0, PAGE = 0 .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */ .stack : > RAMM1, PAGE = 1 .ebss : > RAMLS5, PAGE = 1 .econst : > RAMLS5, PAGE = 1 .esysmem : > RAMLS5, PAGE = 1 ramgs0 : > RAMGS0, PAGE = 1 ramgs1 : > RAMGS1, PAGE = 1 } /* //=========================================================================== // End of file. //=========================================================================== */ Looking forward to your feedback. Best Regards, Nico
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Forum Post: RE: EK-TM4C1294XL: Do the USB Drivers from the TI-RTOS USB Serial DFU project run in Kernel or User Mode?
Hi Tom, You should be able to edit the USB library to force the descriptor to be what you need via hard coding and verify if that solves the problem to start, and then delve more into a better solution when you know it works. Note that if you change usblib, you need to import the usblib project into CCS and rebuild it so it updates the .lib file with the change. I'll go ahead and close this thread for now, but if you have any further questions on this topic feel free to post in here again and I'll see it.
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Forum Post: RE: CCS/LAUNCHXL-F280049C: Download RAM + FLASH or RAM only
Nico, Please do not post the entire contents of a file as a code snippets in a forum post. This cluttters the post and makes it difficult to read through. Instead, upload a file link or wait for the post owner to request the information. Regards, Ozino
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Forum Post: RE: EK-TM4C1294XL: Do the USB Drivers from the TI-RTOS USB Serial DFU project run in Kernel or User Mode?
Hi Ralph, OK I’ll do that. Thanks for the advice. Best regards, Tom van Rijn
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Forum Post: RE: CCS/TMS320F28379D: USB module implementation
Hi Kyungin, Within C2000ware there are a couple examples available: 1. F28379d LAUNCHPAD example: C:\ti\c2000\ C2000Ware _1_00_06_00\device_support\f2837xd\examples\cpu1\launchxl_f28379d\cpu01 2. usb_dev_bulk example: C:\ti\c2000\ C2000Ware _1_00_06_00\device_support\f2837xd\examples\cpu1\usb_dev_bulk\cpu01 Best, Kevin
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Forum Post: RE: RTOS/MSP432E401Y: Timer issue when running without debugger
Thanks for the info! Yes you may close.
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Forum Post: RE: TMS320F28374D: CPU2 issue when debugging : working not properly first time after power on ( just in debug ) , device stdalone always fine
Carlo, I saw your Flash initialization and it looks ok. Did you check the RAM management example ( controlSUITE \device_support\f28m35x\v220\F28M35x_examples_Dual\RAM_management)? In the linker cmd snap that you shared, I can see that GSxRAM is used, but I can't tell whether it is allocated to CPU2 properly or not (meaning, whether proper IPC sync is established between the two cores or not, to make sure that CPU2 uses SharedRAM only after CPU1 gives the ownership. Above example can help in that.). Things to check regarding debugger vs standalone: (1) May be your debugger scenario is not executing M3 first? Do your run M3 first and then C28x in debugger acase as well? (2) In the debugger case, when you see this issue happening, did you try to check whether the intended code (timer) is present in the memory or not? (3) Are you executing the timer ISR from Flash or RAM? If RAM, did you make sure to do the memcpy() correctly? (4) Debugger's gel file does RAM initialization (to Zeros) on target connect. Did you check if this has any role? I hope this is not the issue, since zeroing out the RAM will cause ITRAPs when you fetch. But, is there any RAM data that can affect the timer behavior in your application? Can zeroing the data affect it? Please analyze. I understand it is in target connect - but I don't know your debug flow and hence wanted to bring this to your attention, just in case. Thanks and regards, Vamsi
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Forum Post: RE: CCS/LAUNCHXL-F280049C: Download RAM + FLASH or RAM only
Nico, Have you considered using the F28004x_generic_flash.cmd as a starting point. That file is already configured for a flash application. Please have the customer consult the app note on running from internal flash: www.ti.com/.../spra958l.pdf I suspect some steps are missing regarding running certain section from RAM (section 4). Regards, Ozino
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Forum Post: RE: CCS/F28M36P63C2: FFT on F28M36x
Hi Sira, Thanks for the response. So I believe I have the project setup correctly. I am using the 2833x_RFFT example as a template. I have the properties configured correctly(I hope) and the project compiles. I am stuck in the debugger at the moment. I call the RFFT_f32(&rfft) function and I step through the assembly: _RFFT_f32: ADDB SP,#2 MOVL *-SP[2],XAR4 LCR _rfft_f32_Stages1and2and3andBitReverse MOVL XAR4,*-SP[2] LCR _rfft_f32_Stages4andUp SUBB SP,#2 LRETR everything runs smooth until the LRETR instruction. The debugger throws a message saying there is a break at the program instruction memory position. I believe this is the return instruction at the end of the function call?
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Forum Post: RE: CCS/TMS320F28335: M/T mehtod measure of speed in 28335
Hi Victor, I didn't get much time to look at your post today. What is your overall question on this? When you say it doesn't work well, what is it you're seeing? Best, Kevin
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