Javier The feature you are asking about is not offered by default for Motorware 18. The reason is, as you alluded to, that the ISR and CTRL frequencies are intrinsically tied to the PWM frequency when it is set during initialization. We will be releasing an example of how to change PWM frequency during run-time with the Motor Control SDK release in 2019. Until then, my recommendation for you would be to take the following approach - tie the CTRL frequency to an independent timer module instead of the PWM timer. You will need to do some experimentation on your end as we do not have a reference code available today. Sean
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Forum Post: RE: MOTORWARE: Variable switching frequency
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Forum Post: CCS/TMS320F28377S: Program gets stuck on PLL lock in the initialization
Part Number: TMS320F28377S Tool/software: Code Composer Studio I'm creating a complex project from separate different mini-projects tested individually. The project involves external async memory, PWM, Trip Zones, GPIOs, A2D, interrupts, CLA etc. Each part was tested separately. However, the integration project, based on the (randomly chosen) TI "epwm_trip_zone" example, gets stuck in the very beginning. When trying to boot and to debug the solution, the code gets stucks on the line “while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1)” in function InitSysPll(), file F2837xS_SysCtrl.c. This place is called from the very beginning of main() as a part of HW_Init(): main() --> (first call in main() ) HW_Init() --> (first call in HWInit(), unmodified TI code starts here) InitSysCtrl() --> InitSysPll(), and the stuck line in context is: // Lock the PLL five times. This helps ensure a successful start. // Five is the minimum recommended number. The user can increase this // number according to allotted system initialization time. // for(i = 0; i < 5; i++) { // // Turn off PLL // ClkCfgRegs.SYSPLLCTL1.bit.PLLEN = 0; asm(" RPT #20 || NOP"); // // Write multiplier, which automatically turns on the PLL // ClkCfgRegs.SYSPLLMULT.all = ((fmult << 8U) | imult); // // Wait for the SYSPLL lock counter // while(ClkCfgRegs.SYSPLLSTS.bit.LOCKS != 1) // <----------------- This is the problematic line. { // // Uncomment to service the watchdog // // ServiceDog(); } } This code is run before that my actual code starts to execute. This part of the code didn’t change from the last successfully run iteration; there are lots of changes in the code, but they are executed after the initial HW is set up. However, I did modify the linker command file in order to allocate space for code and data sections. At the build time, I receive a lot of messages like “#10247-D creating output section ".Cla1Prog" without a SECTIONS”. This is (probably) not a HW problem, because “blink” example that initializes HW with the very same functions works on the same hardware correctly. I've looked into the E2E forums; there are 4 questions on the E2E forums regarding the similar issue, none of them solved. Some answers suggest there is a configuration issue, which is what, I suppose, happens with my project too, but I have no idea what configuration change may cause this issue. I've also had personal correspondence with TI employee C. C---mbo (name obscurified in order to hide possibly personal sensitive information), who advised me to take some actions (his words in italic ): The error you get seems pll not able to lock which normally is an Hw issue o the quartz. I doubt this is the case, since I’ve tried the “blink” example on the same hardware, and it works. Up to the point of locking the PLL, there are absolutely no differences in the code between the “blink” example and the project I’m trying to run, (which is based on another example – specifically, “epwm_trip_zone”). If I understand correctly, the fact that “blink” works on the same HW means the problem is not in the code, but in the configuration; however, I don’t understand what exactly in the configuration of the project can lead to this behavior. could you put your code inside the blink example ? Just to double check it works there I’m afraid this would be very difficult. If stripping out the code and inserting it into “blink” project is required for debugging, I’ll do it, but basically it would mean rewriting the integration project. Please another test could be to test your sw on launchpad if f2837x On the launchpad I have exactly the same error. The “blink” example works there too; the integration project gets stuck at the PLL lock line, just as described above. I've tried to use internal oscillator instead of the external one in call to InitSysPll(); it didn't change anything. It’s interesting that if I manually omit the PLL locking with the debugger, I encounter a similar problem later in the initialization sequence, in the following lines: // // Initialize and wait for CLA1ToCPUMsgRAM // MemCfgRegs.MSGxINIT.bit.INIT_CLA1TOCPU = 1; while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CLA1TOCPU != 1){}; <======== Getting stuck here // // Initialize and wait for CPUToCLA1MsgRAM // MemCfgRegs.MSGxINIT.bit.INIT_CPUTOCLA1 = 1; while(MemCfgRegs.MSGxINITDONE.bit.INITDONE_CPUTOCLA1 != 1){}; <=========== And then here Does it mean that there is some problem with configuration of the CLA memory? The same configuration worked in a separate project. Indeed, I’ve extensively reworked the memory configuration file for the linker. I fully understand that since I omitted the PLL locking, correct boot is not guaranteed, but I need to advance in debugging somehow. Additional debugging step I've performed is commenting out my code from the integration project, excluding all my .c files but one with the "main()" function and leaving only hardware initialization and "main()", which was modified to just blink the LED on GPIO 31, exactly as the working "blinky" example does. After I did it, the modified integration project keeps being stuck, while the "blinky" project runs Ok. I've removed the linker command file created by me and used one of the default ones, supplied with the TI C2000 software. It did not change the behavior, - probably the problem is not in the memory allocation. Next step I'm going to perform is to take the working copy of "blinky" project and try to make it stuck in the same way. Would you please advise me on other ways to debug this problem?
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Forum Post: MSP430FR4133: update my setting
Part Number: MSP430FR4133 I want to update my work place and my email how can I do that. david answer to david-p51@013.net.il
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Forum Post: RE: F28M36P63C2: USB TX and RX interrupts stop firing
SysTick is being used in the provided lwIP example in control suite. It was also setup in the OTG example though we are running as host now so it is not needed. From enet_lwip.c under the F28m36x_examples_Master there is a function setup.. Looking through this function I would not be surprised if this was causing the race condition. I have removed this and lwIP is still responding to requests. I am running tests right now with hopes this fixes the issue and will probably update on the 2nd. Best Regards, Todd Atadero void SysTickIntHandler(void) { // // Call the lwIP timer handler. // lwIPTimer(SYSTICKMS); }
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Forum Post: RE: MSP430FR4133: update my setting
when I refer to my user profile there is a field ID/Email Address that can not be edit (part 3) and Company
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Forum Post: RE: TMS320F28379D: C2000
Hello, C2000 processors can be clocked at a certain speed and will execute instructions at a certain rate. These instructions will lead to an effective throughput (measured in MIPS). Depending on the sample rate at which your filters need to operate, the number of taps, the data width, and the device's maximum clock speed, you will be able to run a certain number of filtering operations. For example, with the F28379D, you have 4 cores ( 2 C28x, 2 CLAs), all of them can be clocked at 200MHz. So assume you're running a 3rd order IIR, using 16-bit data and filter coefficients, and are clocking the devices at 200MHz. You'll need approx. 8 Multiply and Accumulates (MACs) per filter output i.e. 4 instructions (assuming you'll use the dual MAC DMAC instruction). The next variable that comes into question is the rate at which the filtering is occurring. Assume that this is at 5MHz (for example, the ADC is feeding the filters data at this rate). So, you basically have 5MHz x 4 = 20MIPS per IIR filter, with a total available 200MIPS budget. So, in theory, you could run 10 such filters "simultaneously" before the CPU or CLA runs out of steam and you run into data underrun. Counting all 4 cores, this would be 40 such filters. And note that we haven't even considered the FFT. But I wanted to give you an idea of how you would go about thinking through this kind of design. If this answers your question, please click on Verified Answer on my response. Thanks, Sira
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Forum Post: RE: About TMS570 Hardware Question
Hello Duke, No limitation. Each ePWM module can be configured to use or ignore the synchronization input. If the TBCTL[PHSEN] bit is set, then the time-base counter (TBCTR) of the ePWM module will be automatically loaded with the phase register (TBPHS) contents when one of the following conditions occur: 1. EPWMxSYNCI: Synchronization Input Pulse 2. Digital Compare Event Synchronization Pulse 3. Software Forced Synchronization Pulse
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Forum Post: RE: MSP430FR6972: Does Controller enter LPM if one of the GPIOs is driven high?
In all LPM modes, GPIO pins configured as outputs continue to drive their values.
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Forum Post: CCS/F28M35H52C: Internal_Loopback_Serial example not working
Part Number: F28M35H52C Tool/software: Code Composer Studio I am trying to run the controlSUITE demo program "Internal_Loopback_Serial" and cannot get CCS to compile the c28 section. CCS generates the following error; ""cannot find file "rts2800_fpu32_fast_supplement.lib" cannot find file "rts2800_fpu32_fast_supplement.lib",internal_loopback_serial_c28, C/C++ Problem"" I found the lib file in the v100 directory and have copied it to all the lib directories in the v210 directory (where I am working), but CCS does not find the library. Also I do not understand why we are calling a math library when testing UARTs. I can not even find where in the example there is a call to the rts2800...lib.
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Forum Post: RE: MSP432P401R: Custom BSL change uart port and module
I would recommend looking at BSL432_device_file.h . Here you will find where the device TLV is used to define the instance, module, and whether the pins are muxed or dedicated. #define BSL432_BSL_PER_IF_SEL_UART_INST (uint8_t)(((BSL432_TLV_BSL_Configuration->BSLPeripheralInterfaceSelection) >> 0) & 0b1111) #define BSL432_BSL_PER_IF_SEL_UART_MOD (uint8_t)(((BSL432_TLV_BSL_Configuration->BSLPeripheralInterfaceSelection) >> 4) & 0b11) #define BSL432_BSL_PER_IF_SEL_UART_MUX (uint8_t)(((BSL432_TLV_BSL_Configuration->BSLPeripheralInterfaceSelection) >> 7) & 0b1) You can replace these with your custom settings, or alternatively you can simply remove the configuration mechanism and hard code your desired configuration. Regards, Chris
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Forum Post: RE: Compiler/TMS320F280049: Proper Optimization Settings for fast control
Kyle, I was able to re-create the issue with the files you sent. It is coming because of transition from compensator designer mode to SFRA based tuning mode in the Compensation Designer. The compensator designer mode sets the freq steps to be 1- fsw/2, however when one switches to the SFRA based tuning it is not re-adjusting the freq steps arrays which is based on the SFRA measured data and causing an error. A workaround to this issue is, open Compensation Designer, browse to a valid SFRA data.csv file and open (I understand the data might look incorrect at this very instant). Next, click "save Comp", then close the compensation designer. re-open the compensation designer, as now a valid SFRA data path is available, it will open in SFRA tuning mode and it will not show the weirdness we discussed above. I will file a bug against it [SFRALIB-42]. This was a new feature we added in the v2. We did not notice this bug, as we had a valid path in Comp.xml that was on my machine and never transitions to SFRA tuning from compensation designer mode. Sorry for the inconvenience it may have caused. Happy new year to you! -Manish
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Forum Post: RE: CCS/TMS320F28377D: Using functions in standard math library throws ILLEGAL_ISR
Mubin, Any updates? If my suggestions helped and your issue is resolved, please click Verified Answer to my reply. Thanks, Sira
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Forum Post: RE: Compiler/TMS320F280049: Proper Optimization Settings for fast control
Manish, Good, I'm not crazy. The save comp didn't fix the issue, but manually changing the path in the XML file to the SFRA directory did. Not sure why the save comp button didn't work, but either way it appears to work now. And now time to migrate and try these newer control functions. Thanks, Kyle
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Forum Post: CCS/TMS320F28379D: USB cable connection - EMI
Part Number: TMS320F28379D Tool/software: Code Composer Studio Hello everyone, Today I was conducting some experiments with an inverter that generates EMI noise. I was using the conventional USB cable that comes with the TI control card to connect with the DSP. Everything works fine until a certain current level above which I lost the connection with the DSP. I highly believe the problem is caused by EMI of the inverter. The TMS320F28379D already have an isolation for the USB so I dont need another one, right? Have anyone faced simmilar issues? Does anyone know if is there any special type of USB cable that can reduce the problem? Are the USB cables that comes with the control card shielded? Does it make any difference? Should I try to shield them? I will try to find the answers and if I figure it out I will post here the solution. Meanwhile, I appreciate any help. Thank you, Renato
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Forum Post: RE: TMS320F28377D: Put some info inside *.hex, during/after compile
Jordan, Not that I am aware of, but I am consulting some experts on my team for feedback as well. Thanks, Sira
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Forum Post: RE: TMS320F28377D: Put some info inside *.hex, during/after compile
I want to add - my experience with this has been where customers want to include information such as software revision numbers etc. in their binary, they dedicate space for it in the Flash, and it gets built into the application binary, so when their application wants to read back the version, they read this location and are able to parse the necessary information. Thanks, Sira
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Forum Post: RE: CCS/TMS320F28377S: Program gets stuck on PLL lock in the initialization
Hi, It's strange. RAM init for CLA MSG RAM not working does not depend on the CLA RAM configuration. I am suspecting that this is something to do with linker cmd file. Can you attach you linker cmd file to have a look. Regards, Vivek Singh
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Forum Post: RE: TM4C123GH6PM: Programming with XDS200 and CCS
[quote user="Ramesh Muruganantham"]Texas Instruments XDS2xx USB Debug Probe_0/CORTEX_M4_0 : Target must be connected before loading program.[/quote]Can you check the Project Properties under Debug -> Auto Run and Launch -> Launch Options to see if the "Connect to the target on debugger startup" option is ticked for the CORTEX_M4 core: If the "Connect to the target on debugger startup" option isn't ticked it I think it will cause the Target must be connected before loading" error when starting a debug session.
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Forum Post: RE: MSP432E401Y: Trouble with Launchpad Bootloader example working
Hi, I already followed your suggestions on Windows: -Mass erased my device -Disabled my firewall -Chose the IPv4 address as my IPServer(In my case I chose 192.168.1.6 because my LAN is 192.168.1.x) But still no luck. Any other ideas why this might not be working? Thanks, Richard
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Forum Post: TIDM-1000: C2000
Part Number: TIDM-1000 If we were to start with circuit in TIDM-1000 , can we transition to this isolated version? do you foresee major changes in the code? thnx sition to the following topology
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