Hi Anil, My customer is seeing similar issues with DPL_CFG for the multi-core project so I am thinking it might be easier to upgrade the MCU+SDK packaged with the Motor Control SDK to avoid all the bugs that might come with the multi-core project. But I am worried that since Motor Control SDK has not been tested with the newest MCU+SDK version, they may run into issues. Which would be the best choice from your viewpoint between the two? Keep MCU+SDK v.9.02 included in Motor Control SDK and make manual changes to allow MPU region selection and DPL_CFG selection Upgrade from MCU+SDK v.9.02 -> v.10.01 to avoid the bugs but risk other issues that might arise from untested version of MCU+SDK for Motor Control SDK Here is the screenshot for DPL_CFG issue: They were able to configure DPL_CFG by adding the following line manually to the .syscfg file. const dpl_cfg = scripting.addModule("/kernel/dpl/dpl_cfg"); Also, have you seen other issues with the multi-core project debug like where shared regions are being over-counted? Best regards, Mari Tsunoda
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Forum Post: RE: AM2434: Configuring MPU Settings but Instance limit has been reached
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Forum Post: RE: LAUNCHXL-F28379D: ADC Illegal_ISR issue
Hi Masoud, I have uploaded both the project folders in one project I have used CPU Timer0 interrupt as SOC for ADCA1 and it is working fine. but then I have created new project in which i have used ePWM3 as SOC for ADCA1 while running that project in FLASH the debugger jumps to illegal_ISR. I have uploaded both the project folders can you please check and help me to identify the cause and solution of the problem. Thanks and Regards, Krunal Shah
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Forum Post: AM2434: DPL CFG Bug in System Project
Part Number: AM2434 Other Parts Discussed in Thread: SYSCONFIG Tool/software: Hi Team, Making a related question. Please check the original thread for some context. My customer is making a system project. They want to configure IPC for an empty project and have a few questions: Is DPL CFG in SysConfig necessary for IPC? It seems like this is necessary because when they try to load the program without it, IPC is not successful. In a system project, when they try to configure DPL CFG in SysConfig, it shows "Add DPL CFG (Maximum exceeded)". Please check the image below. This seems to be related to a bug in MCU+SDK v.10.0 and older, but has been resolved in v.10.01(? not 100% sure) Please read the related thread for the bug. Is the reason why they cannot add DPL CFG related to the bug? How can they add DPL CFG to a system project manually if this is not possible via GUI? Best regards, Mari Tsunoda
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Forum Post: RE: EVM430-FR6043: The evaluation board test transducer cannot receive a valid signal
Hi, It seems that there is no valid signal being received. What transducer you are using? Could you send out a picture of your board the transducer with pipe? Best regards, Cash Hao
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Forum Post: RE: TMDSEMU110-U: XDS110 for AM62Ax
Hi, Awaiting for response. I need to understand the feasibility of using XDS110 to flash & debug all cores (A53,R5F, C7x). I will be using Linux or VxWorks platform. Thanks, Nikunj
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Forum Post: RE: MCU-PLUS-SDK-AM243X: Unable to debug on M4 Hello World project
Hello, The following patch should resolve the issue. diff --git a/examples/hello_world_cpp/am243x-evm/m4fss0-0_nortos/example.syscfg b/examples/hello_world_cpp/am243x-evm/m4fss0-0_nortos/example.syscfg index 37917c45..1b90fd37 100644 --- a/examples/hello_world_cpp/am243x-evm/m4fss0-0_nortos/example.syscfg +++ b/examples/hello_world_cpp/am243x-evm/m4fss0-0_nortos/example.syscfg @@ -23,6 +23,7 @@ const section5 = section.addInstance(); const section6 = section.addInstance(); const section7 = section.addInstance(); const section8 = section.addInstance(); +const section9 = section.addInstance(); const addr_translate = scripting.addModule("/kernel/dpl/addr_translate", {}, false); const addr_translate1 = addr_translate.addInstance(); @@ -105,17 +106,11 @@ section4.output_section[1].palignment = true; section5.load_memory = "M4F_IRAM"; section5.group = false; section5.$name = "Memory and Stack Segments"; -section5.output_section.create(5); +section5.output_section.create(2); section5.output_section[0].$name = ".sysmem"; section5.output_section[0].palignment = true; section5.output_section[1].$name = ".stack"; section5.output_section[1].palignment = true; -section5.output_section[2].$name = ".ARM.exidx"; -section5.output_section[2].palignment = true; -section5.output_section[3].$name = ".init_array"; -section5.output_section[3].palignment = true; -section5.output_section[4].$name = ".fini_array"; -section5.output_section[4].palignment = true; section6.type = "NOLOAD"; section6.load_memory = "USER_SHM_MEM"; @@ -141,6 +136,17 @@ section8.output_section.create(1); section8.output_section[0].$name = ".bss.ipc_vring_mem"; section8.output_section[0].alignment = 0; +section9.load_memory = "M4F_DRAM"; +section9.group = false; +section9.$name = "C++ Sections"; +section9.output_section.create(3); +section9.output_section[0].$name = ".ARM.exidx"; +section9.output_section[0].palignment = true; +section9.output_section[1].$name = ".init_array"; +section9.output_section[1].palignment = true; +section9.output_section[2].$name = ".fini_array"; +section9.output_section[2].palignment = true; + addr_translate1.$name = "CONFIG_ADDR_TRANSLATE_REGION0"; addr_translate1.localAddr = 0x80000000; This patch moves the C++ related sections from the M4F_IRAM memory region to M4F_DRAM memory region. Regards, Prashant
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Forum Post: RE: MSP430FR6047: msp430FR6047
when the device is stuck game over only reprograming the device takes it out , even power down is not work.
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Forum Post: RE: TMS320F28388D: Deploy neural network model ( from my own ONNX file export by Pytorch) using edgeAI studio for C2000
For once could you try with C2000Ware 5.04 instead of motor control sdk 5.03? Remember to set the C2000ware_path environment variable again
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Forum Post: RE: AM2434: How to know which core the active core is?
Hello Mari, Can you please explain what the usecase here ? The memory is shared in between the cores and if both cores are accessing the memory, then the user wants to know which core is accessing the memory ? Regards, Anil.
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Forum Post: RE: AM2434: How to know which core the active core is?
Hi Anil, Yes, the usecase is as you described. Could they use the bootloader self core ID: uint32_t Bootloader_getSelfCpuID(); Or the DMSC Self ID: uint32_t Sciclient_getSelfDevIdCore()? Or is the usage different? Best regards, Mari
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Forum Post: AM2434: IPC Notify instead of SGI
Part Number: AM2434 Tool/software: Hi Team, Is there no software interrupt for the AM2434? I checked the interrupt map in the TRM for the R5F0-0 core but could not find. Can IPC Notify be used similarly to a software interrupt? Best regards, Mari
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Forum Post: RE: MCU-PLUS-SDK-AM243X: Endat22 driver layer
Alan Sorry for the late response here. According to our discussion with Heidenhain, it is up-to the EnDat Master to interpret the data correctly. In practice, both approaches work. Do you see any concern in using the TI suggested design? Regards Dhaval
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Forum Post: AM2432: Digital output is not working
Part Number: AM2432 Tool/software: Hi team, I'm developing mcu plus sdk / gpio_led_blink.c with AM2432. I assign pins SPI0_CS1, SPI0_CLK, SPI0_D0 and SPI0_D1 as Digital output. When I added these pins to TI DRIVERS GPIO of example.syscfg, it caused error. Then I added these pins to Reserve Peripherals GPIO, and changed pin direction to 0 by GPIO_setDirMode(). but no output from these pins. Could you tell me, why I can't add pins to TI DRIVERS GPIO of example.syscfg, and How to use SPI0 pins as GPIO. Best regards, oyama
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Forum Post: RE: AM2434: How to know which core the active core is?
Hello Mari, The above use case is not possible. The CPU will take care of these operations and these operations internal to the CPU . Once the IPC interrupt gets notified, it means the shared memory write or read operation is done. This is how users should know the IPC write or read operation completion. Regards, Anil.
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Forum Post: RE: MSPM0G3507: CAN RX gets stuck when multiple messages are incoming
Hi, [quote userid="571933" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1464722/mspm0g3507-can-rx-gets-stuck-when-multiple-messages-are-incoming/5643601#5643601"]But need to waiting for MCAN RAM init done, you can set the filter.[/quote] I compared my SYSCFG_DL_MCAN0_init() to the SYSCFG_DL_MCAN0_init() in the mcan_multi_Msg_RxTx_Interrupt_LP_MSPM0G3507_nortos_ticlang example project. Both functions are completely identical. So the MCAN RAM init ( /* Wait for Memory initialization to be completed. */ while ( false == DL_MCAN_isMemInitDone (MCAN0_INST)); ) is waited to be done before I add my filters. Is this what you wanted me to make sure? ________________________________________________________________ [quote userid="571933" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1464722/mspm0g3507-can-rx-gets-stuck-when-multiple-messages-are-incoming/5643601#5643601"] Could you please try to test the MCAN based on my project. It works normal when set the right filter. [/quote] Yes, I will check that. ________________________________________________________________ [quote userid="571933" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1464722/mspm0g3507-can-rx-gets-stuck-when-multiple-messages-are-incoming/5643601#5643601"]Check whether you enable the RXFIFO1 interrupt[/quote] I enable the FIFO 0 New Message interrupt in the beginning of my int main(void). DL_MCAN_enableIntr (MCAN0_INST, DL_MCAN_INTERRUPT_RF0N, 1U ); // Rx FIFO 0 New Message interrupt Instead of DL_MCAN_INTERRUPT_RF0N I could have chosen DL_MCAN_INTR_SRC_RX_FIFO0_NEW_MSG Am I right? I have no corresponding activation/enabling of an interrupt for FIFO1 in my source code. ________________________________________________________________ [quote userid="571933" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1464722/mspm0g3507-can-rx-gets-stuck-when-multiple-messages-are-incoming/5643601#5643601"]Also, interrupt need to check every interrupt you enabled to confirm which interrupt is triggered.[/quote] I do check what triggered my IRQ like this: void MCAN0_INST_IRQHandler(void) { switch (DL_MCAN_getPendingInterrupt(MCAN0_INST)) { case DL_MCAN_IIDX_LINE1: // RX FIFO 0 New Message - interrupt /* Check MCAN interrupts fired during RX of CAN package */ gInterruptLine1Status |= DL_MCAN_getIntrStatus(MCAN0_INST); /* New message received by Rx FIFO 0 (Filter matched) */ if(gInterruptLine1Status & DL_MCAN_INTERRUPT_RF0N) { ... } ________________________________________________________________ [quote userid="571933" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1464722/mspm0g3507-can-rx-gets-stuck-when-multiple-messages-are-incoming/5643601#5643601"]Don't put printf function in interrupt, printf will takes a lot of time to printf string.[/quote] Yes sure.. I just use it for debugging.. But this does not cause my filtering issue, does it? Thanks in advance! Matze
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Forum Post: RE: TMS320F28388D: Deploy neural network model ( from my own ONNX file export by Pytorch) using edgeAI studio for C2000
i tried the C2000Ware 5.04 but it is still the same error above
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Forum Post: RE: EVM430-FR6043: The evaluation board test transducer cannot receive a valid signal
We are using the EVM430-FR6043 development board and a 200Khz transducer, and we are testing them by using two transducers in opposition.
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Forum Post: RE: MSPM0L1228: copy prebuilt file into project
Hi Dylan, I didn't get a [project_name].o. Only single .o for each source file. And I would say I didn't change something in the Properties. Please tell me where I can enable it. What I get is a .out, as I said. But this will force the error Description Resource Path Location Type #10417 file "../Bootloader/bootloader.out" could not be statically or dynamically linked /firmware-ti C/C++ Problem If somebody from software tools could support, that would be nice. Regards, Timo
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Forum Post: RE: AM2434: Configuring MPU Settings but Instance limit has been reached
Hello Mari, My suggestion is, please go with the new MCU+SDK version and do the Testing. If this testing take more time and is not able to meet any SW deadlines, then customers should stick with the old version and make the manual changes to the MPU and DPL CFG settings. And one more suggestion is that when a customer is working on the multicore project instead of taking a system project, take individual 4 R5F projects and integrate the customer application and compile them individually for temporally . When customers work on individual projects then there is no problem with the MPU settings and DPL settings and all can be configured till 16 regions for each one core. But only one problem is when customer is selecting the same peripheral in other creates an issue and this is need be take care by customer . And, generating the multicore app image we need to take the all individual app images and generate the multicore app image . For the compilation we need to run individual projects. Regards, Anil.
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Forum Post: RE: TMS320F28388D: Deploy neural network model ( from my own ONNX file export by Pytorch) using edgeAI studio for C2000
the main problem here: >> WARNING: object file specified, but linking not enabled [tinie_soft.cc] "C:\Users\Phong Doi khong\AppData\Local\Programs\Python\Python310\Lib\site-packages\tvm\3rdparty\tinie-api/soft/src/tinie_soft.cc", line 68: fatal error: cannot open source file "soft/inc/tinie_soft.h" 1 catastrophic error detected in the compilation of "C:\Users\Phong Doi khong\AppData\Local\Programs\Python\Python310\Lib\site-packages\tvm\3rdparty\tinie-api/soft/src/tinie_soft.cc". Compilation terminated. >> Compilation failure --> Can you suggest a solution for that?
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