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Forum Post: RE: MSP430F2619S-HT: USCI A0/B0 Interrupt conflict.

When the following code is run, it typically gets stuck in the UART Tx ISR. If I disable I2C interrupts the UART behaves as expected.

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Forum Post: RE: MSP430F2619S-HT: USCI A0/B0 Interrupt conflict.

>#pragma vector = USCIAB0RX_VECTOR >__interrupt void USCI_TX_ISR ( void ) It looks as though the Tx/Rx vectors have been assigned backwards. ("vector=" applies to the immediately following...

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Forum Post: RE: MSPM0G3507: ADC sample time(SCOMP0, SCOMP1) select standard

Hi Ryan, thanks for the question. The values for SCOMP0 and SCOMP1 are user-defined values. The value in SCOMPx configures the sampling period by defining the number of sample time clocks to set the...

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Forum Post: RE: TM4C129XNCZAD: I want to implement RTC in tn4c129XNCZAD

Hi, I will reply to you later today as I'm currently on vacation. The RTC is part of the Hibernate module. Please reference the Hibernate example on how to setup the RTC counter.

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Forum Post: RE: MSPM0G3507: Communicate With a 1.8-V Device Without a Level...

Hi Ryan, this is an example discrete external circuit using transistors, there is no 1.8V level shifter inside the M0. Hope this helps!

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Forum Post: RE: MSP430F2619S-HT: USCI A0/B0 Interrupt conflict.

Hello Bruce thanks for taking the time to reply, and thanks for catching that error. Unfortunately that was an oversight on my part, and it appears I managed to introduce that error when sticking the...

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Forum Post: RE: AM2432: How to enable debugger breakpoints on core-1

Hi Tushar, I'm in debug mode with -Og optimization. The debugger for both cores set to break in main - maybe that's the problem ? here are the setups I see diferences between cores setup - maybe I...

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Forum Post: RE: TMS320F28388D: ESC Emulated EEPROM

Hi, Yes, it is possible. See my prior answer in below E2E:...

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Forum Post: RE: TMS320F28P550SJ: M0/M1 initialization fails after POR

Hi Pawan, I tested it and it works. Thank you for your support. // By default RAM is only initialized to zero by power-on reset, but not by warm reset // _system_pre_init() is to initialize RAM to...

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Forum Post: RE: MSPM0G3507: Application programmed via I2C BSL fails to...

Hi Sal, Thanks for your rapid response. I used the XDS110 probe to load a valid application into the flash memory, and launched UniFlash to display the contents of the memory. Both the application...

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Forum Post: RE: MSP430F5419: Are there any other specifications required for...

Hi, thanks for the question. I would recommend the following which is on page 24 of the datasheet: Hope this helps!

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Forum Post: RE: MSP430F2619S-HT: USCI A0/B0 Interrupt conflict.

> If I disable I2C interrupts the UART behaves as expected. Checking for IFG2:UCB0TXIFG doesn't clear it. (Writing UCA0TXBUF does clear UCA0TXIFG.) If you're not interested in (interrupting for) the...

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Forum Post: RE: MSP430F2619S-HT: USCI A0/B0 Interrupt conflict.

Hi Bruce, I appreciate the continual support. So the plan was to enable the UCB0 Tx/Rx ISRs and have them just stick the relevant byte into or pull from two new cyclic buffers. We can deal with the...

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Forum Post: RE: TMS320F280025: convert 2 lines of code from DriverLib mode to...

Hi Quentin, Just to confirm, at the top of your code, you should have a line of code in your main .c file that reads #include "f28002x_device.h" This will require including " C:/ti/c2000/C2000Ware_...

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Forum Post: RE: MSP430F2619S-HT: USCI A0/B0 Interrupt conflict.

Thanks for jarring my memory -- I went back to the UG [Ref Sec 17.3.7.4, plus Examples 17-1 and 17-2]. For I2C (only), the Tx vector serves TXIFG and RXIFG; the Rx vector serves the others (STT, STP,...

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Forum Post: RE: MSPM0G3507: MSPM0G3507

Hello, The example provided by Pengfei above shows how it can be done for MSP432, the same method can be applied to MSPM0 as well. Please switch the configuration to use MSPM0 instead of MSP432 as you...

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Forum Post: TMS320F2800132: TMS320F2800132 Can't change Watchdog from...

Part Number: TMS320F2800132 Tool/software: Hi Everyone, I am using TI's self diagnostic library for my safety tests. While WatchDog self test use interrupt mode, our WD use reset mode. So we need to...

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Forum Post: RE: MCU-PLUS-SDK-AM243X: does not configuration PCIe endpoint...

That change is intentional. The pcie_enumerate_ep example should show how this is intended to be used. By splitting cfgEP from the driver initialization, it is possible to modify the ep configuration...

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Forum Post: TMS320F28P550SJ: outline for 56-pin package

Part Number: TMS320F28P550SJ Tool/software: Hi Champs, There is no package outline for RSH56 in the datasheet . I can also try the Find packages tool on TI website but no result. Where can I find it?...

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Forum Post: RE: TMS320F2800132: TMS320F240PQA writing a backup into a new chip

Hi, Unfortunately, the TMS320F240/TMS320F241/TMS320F243 devices attained End-of-Life (EOL) status many years ago, and as such we will not able to support questions about these products. TI stopped...

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