Part Number: TMS320F28035 There are two H-bridges, the first arm is drived by CH1/CH2 and the second are is drived by CH3/CH4.The two H bridges is the same frequency, but the dead zone is different, and dead zone switch between the two arms. As shown in the figure below, the front driver is CH1/CH2 with a dead time greater than CH3/CH4, and the second driver is CH3/CH4 with a dead time greater than CH1/CH2. From the waveform diagram, the function has been realized, but there is such a problem in the debugging process. During the debugging process, the following waveforms appear, that is, the first CH1/EPWM1A after switching has only half of the driving waveforms, and the subsequent waves are normal. Try to analyze why EPWM1A appears this phenomenon, because the configuration of EPWM1A and EPWM3A is exactly the same, and the post-EPWM1A wave is also correct, so it is not clear why the first driver will appear half of the phenomenon. Finally, by modifying EPwm1Regs. HRPCTL. bit. HRPE = 1; EPwm1Regs. HRPCTL. bit. HRPE = 0; the following waveforms are obtained 1. At present, TMS320F28035PN is used. 2. Blockade and recovery are achieved through the configuration of register AQCTLA/AQCTLB, which is to configure AQCTLA/AQCTLB before each blockade or recovery. We implement dead-zone switching under fixed-frequency open-loop. The two waves are calculated by the same loop, but the wave amount is fine-tuned according to the wave configuration after the wave is emitted. Take EPWM1A and EPWM3A as examples, both of them are EPwmRegs.AQCTLA.bit.CAD = AQ_SET; EPwmRegs.AQCTLA.bit.CAU = AQ_CLEAR; if the result of the loop calculation is CMP1, incremental. The dead time of EPWM 3A is CMP delta, which requires EPWM 1Regs. CMPA = CMP 1 - CMP delta, EPwm 3Regs. CMPA = CMP 1. Conversely, the dead time of EPWM 3A is larger than that of EPWM 1A, EPwm 1Regs. CMPA = CMP 1, EPwm 3Regs. CMPA = CMP delta. 3. At present, the phenomena tested are: under the configuration of EPwm1Regs. HRPCTL. bit. HRPE = 1, this phenomenon will occur every time when the first driver fixed after AQCTLA/AQCTLB is reconstructed, and the subsequent driving waveforms are normal. The current configuration of EPWM1A's COMP loading mode is as follows: EPwm1Regs. CMPCTL. bit. LOADAMODE = CC_CTR_ZERO_PRD; EPwm1Regs. CMPCTL. bit. SHDWAMODE = CC_SHADOW;。 Combining with the above phenomena, I want to know why the first driver of EPWM1A will lose half when high-precision is enabled, and the shielding of high-precision EPWM1A will return to normal. What is the relationship between this, thank you.
↧