Part Number: TMS320F28035 Here is a customer issue using CAN in F28035, to communicate with the computer. When mailboxes 0 and 2 are enabled to receive message, it works, but when mailboxes 0, 1 and 2 are enabled, it fails. The ISR is enabled at the receiving event of mailbox 0, and the set breakpoint can not be accessed with mailboxes 0, 1 and 2 enabled. The below is the eCAN configuration for mailboxes 0, 1 and 2 enabled. (3,4,5,6 to send，0,1,2 to receive) void InitECana(void) // Initialize eCAN-A module { Uint32 i,*addr; unsigned long ulECanCntTmp; struct ECAN_REGS ECanaShadow; EALLOW; ECanaRegs.CANME.all=0x00000000;// // CANTX ECanaShadow.CANTIOC.all=ECanaRegs.CANTIOC.all; ECanaShadow.CANTIOC.bit.TXFUNC=1; ECanaRegs.CANTIOC.all=ECanaShadow.CANTIOC.all; // CANRX ECanaShadow.CANRIOC.all=ECanaRegs.CANRIOC.all; ECanaShadow.CANRIOC.bit.RXFUNC=1; ECanaRegs.CANRIOC.all=ECanaShadow.CANRIOC.all; /* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */ //HECC mode also enables time-stamping feature ECanaShadow.CANMC.all=ECanaRegs.CANMC.all; ECanaShadow.CANMC.bit.SUSP=1;// ECanaShadow.CANMC.bit.SCB=1; // ECanaShadow.CANMC.bit.ABO=1; // ECanaRegs.CANMC.all=ECanaShadow.CANMC.all; /* Initialize all bits of 'Master Control Field' to zero */ //Some bits of MSGCTRL comeup in an unknown state.all bits (including reserved bits) of MSGCTRL must be initialized to zero //ECanaMboxes.MBOX0.MSGCTRL.all =0x00000000; //... for(i=0x6100;i 20000)//10.4ms { break; } } ECanaShadow.CANBTC.all=0; ECanaShadow.CANBTC.bit.BRPREG=7;//19; // 30000000/{(19+1)*[(2+1)+(1+1)+1}=250KB ECanaShadow.CANBTC.bit.TSEG2REG=2;//1; // 30000000/{(9+1)*[(2+1)+(1+1)+1}=500KB ECanaShadow.CANBTC.bit.TSEG1REG=10; ECanaShadow.CANBTC.bit.SAM=0; // ECanaShadow.CANBTC.bit.SJWREG=2; //0; ECanaRegs.CANBTC.all=ECanaShadow.CANBTC.all; ECanaShadow.CANMC.all=ECanaRegs.CANMC.all; ECanaShadow.CANMC.bit.CCR=0; ECanaRegs.CANMC.all=ECanaShadow.CANMC.all; ECanaShadow.CANES.all=ECanaRegs.CANES.all; ulECanCntTmp=0; while(ECanaShadow.CANES.bit.CCE!=0)//14.4us //Wait for CCE bit to be cleared.. { ECanaShadow.CANES.all=ECanaRegs.CANES.all; ulECanCntTmp++; if(ulECanCntTmp>20000)//10.4ms { break; } } ui32CanMePara=0x0000007F; // 0x0000007F ECanaRegs.CANME.all=ui32CanMePara; //Required before writing the MSGIDs ECanaRegs.CANMD.all=0x00000007; //Mail direction,0:transmit,1:receive 3,4,5,6 to send, 0,1,2 to receive EDIS; CanaLAMRegs.LAM0.all=0x87FFFFFF; // ECanaLAMRegs.LAM1.all=0xFFFFFFFF; // ECanaLAMRegs.LAM2.all=0x87FF0000;; } The only difference between two configuration is 1) for 3 maiboxes ui32CanMePara=0x0000007F; ECanaRegs.CANME.all=ui32CanMePara 2)for 2 mailboxes ui32CanMePara=0x0000007D; ECanaRegs.CANME.all=ui32CanMePara Could you help please help provide some suggestion on this issue? I will involve the customer for further information needed. Thank you!
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