I'll see if I can do a better job of clarifying what these terms are referring to. For a 2K EEPROM, starting on the small end we have...
512 32-bit words:
These are the smallest addressable data units for reading and writing.
32 16-word "blocks":
These are the smallest data units for protection and hiding settings. Each block can be thought of as containing 16 words of addressable user data.
1 16-word copy buffer:
This can be thought of as an "extra block", capable of temporarily storing 16 words worth of non-volatile data. This is not a part of the main 32 blocks of user data.
The implementation of these objects is where things get a little hairy. While each block only has 16 user-accessible words at any given time, it actually physically has 7 "slots" (for lack of a better term) dedicated for each word. When you write a 32-bit word to the block, it will store the new data in the first open "slot" for that word. If you write to the same word on the same block seven times, all of its slots will be full. This means that the eighth write requires us to erase a previously-used slot. The way the EEPROM blocks are physically implemented, this requires us to erase all data in the entire block, including all 7 slots for all 16 words. The only way to do this while ensuring data integrity is to use the copy buffer.
The copy buffer is a smaller block that can physically hold 16 words of data in one slot per word. During a block erase, it will hold the most recent copy of each word in the block to be erased. Afterwards, the EEPROM controller will write these words back to the original block, freeing up 6 new slots for all words in the block. The copy buffer isn't automatically erased after it is used, so it will still contain data from the previously erased block. The EEPROM will erase the copy buffer automatically if a second "normal" block needs to be erased (at some time penalty), or the user can erase it any time at their discretion. Either way, it must be erased every time it is used because it only physically has enough space for one copy operation.
I don't have a lot of information on how interruptions and similar events are handled during this process. Theoretically, the EEPROM should always be able to give you the "old version" of a particular word until the "new version" is ready, wherever this word may physically be stored. Unfortunately, the datasheet isn't particularly clear on these points, and I don't know enough about the internals of the design to be able to conclusively say.
I'm also not completely sure on the issue of repeatedly writing the same data to the same location within the EEPROM. I haven't read any documents that suggest that the EEPROM will treat these writes any differently, so I would expect it to perform a write or erase-write every time, and I would expect your checking system to save you a few cycles.
I can try to get comments on these last two points from the IC design team if they are important for your design.
Regards,
Christian