Part Number: TMS320F28335 Ref the eCAN Reference Guide - SPRUEU1 I am needing to handle a lot of CAN messages arriving in a short time. Following the guide, I plan to set up several mailboxes to receive the messages, protecting all but the one with the lowest number, and interrupt when messages arrive. Section 3.2.4 Receiving a Message says This example uses mailbox 3. When a message is received, the corresponding flag in the receive message pending register (CANRMP) is set to 1 and an interrupt can be initiated. The CPU can then read the message from the mailbox RAM. Before the CPU reads the message from the mailbox, it should first clear the RMP bit (RMP.3 = 1). The CPU should also check the receive message lost flag RML.3 = 1. Depending on the application, the CPU has to decide how to handle this situation. After reading the data, the CPU needs to check that the RMP bit has not been set again by the module. If the RMP bit has been set to 1, the data may have been corrupted. The CPU needs to read the data again because a new message was received while the CPU was reading the old one. It seems to me that if I clear RMP in a protected mailbox before reading the data, then I am inviting the peripheral to overwrite the data, even if there is another empty mailbox which could be used. Thus I think I should be (1) Reading the data and then (2) clearing RMP. If the mailbox is protected, this should be OK as no new message can be stored in the mailbox until after the read. But if it is not protected, and RML was already set before the read, I suppose that leaves no way to determine if the data has been overwritten/corrupted? Am I missing something? Any help appreciated.
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