Appears your issue is as much, "C Programming" as Stellaris based.
If indeed your report of, "Success only upon first pass thru your 8 bit Data Modulation Loop," is the case - or has been understood correctly - do look here:
unsigned long pwm_dataVec[PWM_DATA_BITS + 1]; // *** atop your code ... and then:
// for( i = 0; i < PWM_DATA_BITS - 1; i++ ) // *** followed by: // pwm_dataVec[PWM_DATA_BITS]=1; // indeed - both are "commented out" - but signals some indecision - your team...
then w/in your critical Modulation Loop:
if (pwm_data_index > (PWM_DATA_BITS - 1))
{
// PWMPulseWidthSet(PWM_BASE, PWM_OUT_2, pwm_dataVec[0]);
// PWMGenIntTrigDisable(PWM_BASE, PWM_GEN_1, PWM_INT_CNT_AD);
PWMGenDisable(PWM_BASE, PWM_GEN_1); // to minimize the glitch of the final PWM pulse++
return;
}
PWMPulseWidthSet(PWM_BASE, PWM_OUT_2, pwm_dataVec[pwm_data_index]);
if (pwm_data_index > (PWM_DATA_BITS - 2)) //for the last bit enter interrupt on compare event (output goes low)
{
PWMGenIntTrigEnable(PWM_BASE, PWM_GEN_1, PWM_INT_CNT_AD);
}
++pwm_data_index;
Concern is that "first pass" may be treated differently than all which follow - which you report as, "missing LSB." Your report is unclear as to whether it is just the 2nd byte which is abbreviated - or all bytes (i.e. bytes 2 - n) so suffer.
Note that beyond the pre-load: "PWM_DATA_BITS + 1" - your loop counter, "pwm_data_index" appears not to be clearly managed. (i.e. reset) Suggest you review your preset, unroll & repeated entry into this loop...
*** while not part of that loop issue - you employ, "GPIOPinConfigure(GPIO_PA0_U0RX); & GPIOPinConfigure(GPIO_PA1_U0TX);"
From my memory - GPIOPinConfigure() may not be appropriate for your 6965 "class" MCU. SW-DRL-UGxxxx will detail (gpio section)... And good luck - your search for vital, "Class Decoder Ring..."