[quote user="Daniel Berenguer"]OK so given that I can not fix the internal voltage reference at 2.5V I understand that I have not to care about the (fADC12CLK < 2.7 MHz) condition BUT I have to enable REFOUT whilst bypassing Vref+. Am I right?[/quote]You can as well set the ADCCLK to <2.7MHz (by applying a /3 divider when using MODOSC, or using SMCLK with a proper frequency). It makes the ADC slower (you can reduce the SHT settings then) but removes the need of externally buffering the reference. If you already have the PCB and no external buffer caps, then this is the easier way – unless you need the ADC speed.
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