On non-A devices, maximum speed was 18MHz, so you have been closer to the max speed.
It is possible that your crystal has hiccups on ESD event, causing short CPU cycles. On A version, you have more reserve for the maximum CPU speed than on the non-A, so the critical limit is higher and the system is less sensitive.
You could try the following: output XT2 to a port pin (MCLK/SMCLK output) and check whether it is stable when the device crashes. You might find an erratic clock pulse that crashes the CPU.
Also, as you described, you may use XT2 for communication only, and use DCO for MCLK (maybe running the DCO on 32MHz, divided by two). Or use a 32MHz crystal and divide by 2, if you don't already need the MCLK or SMCLK divider.