David,
I don't have the header that you're referencing (iotms570LS3137zwt.h) handy - actually not sure which package this came from.
But looking at the generated code, I see that the 2nd example is using LDRH and STRH instructions to access the I2CMDR register. These are 16-bit reads and writes (which might make some sense as I belive the I2C peripheral is natively a 16-bit peripheral). On the other hand, the HalCoGen header has this address declared as a 32-bit register.
Let me know where to find the iomtms...h file and we can check it or if you want to check it, I suspect it could be an issue of endian. The address 0x24 which is 32-bit aligned in the header file from HalCoGen is endian independent. But if you use a 16-bit aligned address, I'm pretty sure it would need to change to 0x26 because the bits of the register appear to be on the lower 16-bits of the word which is offset +2 for a big endian device. (for a little endian part like RM48 I think it would be still ok as 0x24...)