Hi Stevan From my tests, the clock initialization of all routines in "C:\ti\c2000\C2000Ware_3_04_00_00\driverlib\f28004x\examples" will perform DCC calibration, whether for CAN, PWM, timer, etc. We installed C2000Ware 5.04 as per your suggestion and tested it using DCC examples. The test results are as follows: Similarly, we used the internal clock and entered Debug mode. A breakpoint was added at the end of the SysCtl_isPLLValid() function, where we could observe the relevant register values when DCC calibration succeeded or failed. Test Results: For normal samples, both Counter1 and Counter0 counts reached 0 simultaneously, and Dcc0Regs.DCCSTATUS.DONE = 1. For abnormal samples, Counter1 reached 0 before Counter0, and Dcc0Regs.DCCSTATUS.ERR = 1. I believe no further tests can be conducted locally. The issue is chip-dependent, occurring with a probability of 1%. It can be easily reproduced on problematic chips. I'm not sure if this is related to the PLL locking failure mentioned in the errata of 280049, but please provide a clear response and a workaround.
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