Part Number: TMS320F28377D Tool/software: Hello, I am trying to set up the following configuration in a tms320f28377d: - Enable CMPSS1 - 2 - 3 - 4 - 5 - 6 - Enable EPWM 7 - 8 For some reason when i enable the CMPSS1 with the following function, the EPWM 7 and 8 shut down. This is not happening with CMPSS3 (or 2 - 4 - 5 -6) enable function. Hereafter you can find the CMPSS1 enable function and the function used to enable the other 5 CMPSS. The register of EPWM 7 and 8 do not show any apparent connection to other trip zone, etc. void CMPSS1_Enable(enum EPWM_MODULE mod){ volatile struct CLK_CFG_REGS ClkCfgRegs; CORE_Eallowext(); CpuSysRegs.PCLKCR14.bit.CMPSS1 = 1; CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0; ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV =0; epwmRegs[mod]->TBCTL.bit.CLKDIV = 0; epwmRegs[mod]->TBCTL.bit.HSPCLKDIV = 0; epwmRegs[mod]->TBCTR = 0; epwmRegs[mod]->TBPRD = 0xFF; epwmRegs[mod]->TZCTL.bit.DCBEVT1 =1; // 01: Force EPWMxA to a high state epwmRegs[mod]->TZCTL.bit.DCAEVT2=2; // 10: Force EPWMxB to a low state epwmRegs[mod]->TZDCSEL.bit.DCAEVT2 =2; //010: DCBH = high, DCBL = don't care epwmRegs[mod]->DCTRIPSEL.bit.DCAHCOMPSEL = 0xF; epwmRegs[mod]->DCAHTRIPSEL.bit.TRIPINPUT4 = 1; epwmRegs[mod]->AQCTLA.bit.CAU= 2; epwmRegs[mod]->AQCTLA.bit.ZRO= 1; epwmRegs[mod]->DCACTL.bit.EVT2SRCSEL = 0; epwmRegs[mod]->DCACTL.bit.EVT2FRCSYNCSEL = 1; epwmRegs[mod]->TZDCSEL.bit.DCBEVT1=3; //001: DCAH = low, DCAL = don't care epwmRegs[mod]->DCTRIPSEL.bit.DCBLCOMPSEL=0xF; epwmRegs[mod]->DCBLTRIPSEL.bit.TRIPINPUT5 = 1; epwmRegs[mod]->AQCTLB.bit.CBU= 1; epwmRegs[mod]->AQCTLB.bit.ZRO= 1; epwmRegs[mod]->DCBCTL.bit.EVT1SRCSEL = 0; epwmRegs[mod]->DCBCTL.bit.EVT1FRCSYNCSEL = 1; CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1; XBAR_setEPWMMuxConfig(XBAR_TRIP4 ,XBAR_EPWM_MUX00_CMPSS1_CTRIPH); XBAR_setEPWMMuxConfig(XBAR_TRIP5 ,XBAR_EPWM_MUX01_CMPSS1_CTRIPL); XBAR_enableEPWMMux(XBAR_TRIP4, XBAR_MUX00); XBAR_enableEPWMMux(XBAR_TRIP5, XBAR_MUX01); epwmRegs[mod]->TZCLR.bit.CBC = 1; epwmRegs[mod]->TZCLR.bit.INT = 1; epwmRegs[mod]->TZEINT.bit.CBC = 1; epwmRegs[mod]->TBCTL.bit.CTRMODE =TB_COUNT_UPDOWN; CORE_Edisext(); CMPSS_enableModule(CMPSS1_BASE); CMPSS_configHighComparator(CMPSS1_BASE, CMPSS_INV_INVERTED); CMPSS_configLowComparator(CMPSS1_BASE, CMPSS_INSRC_DAC); CMPSS_setDACValueHigh(CMPSS1_BASE,cmpss_Hvalue); CMPSS_setDACValueLow(CMPSS1_BASE, cmpss_Lvalue); CMPSS_setHysteresis(CMPSS1_BASE,hysteresis); CMPSS_enableModule(CMPSS1_BASE); EPWM_Start(mod); } void CMPSS3_Enable(enum EPWM_MODULE mod){ volatile struct CLK_CFG_REGS ClkCfgRegs; CORE_Eallowext(); CpuSysRegs.PCLKCR14.bit.CMPSS3 = 1; CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0; ClkCfgRegs.PERCLKDIVSEL.bit.EPWMCLKDIV =0; epwmRegs[mod]->TBCTL.bit.CLKDIV = 0; epwmRegs[mod]->TBCTL.bit.HSPCLKDIV = 0; epwmRegs[mod]->TBCTR = 0; epwmRegs[mod]->TBPRD = 0xFF; epwmRegs[mod]->TZCTL.bit.DCBEVT1 =1; // 01: Force EPWMxA to a high state epwmRegs[mod]->TZCTL.bit.DCAEVT2=2; // 10: Force EPWMxB to a low state epwmRegs[mod]->TZDCSEL.bit.DCAEVT2 =2; //010: DCBH = high, DCBL = don't care epwmRegs[mod]->DCTRIPSEL.bit.DCAHCOMPSEL = 0xF; epwmRegs[mod]->DCAHTRIPSEL.bit.TRIPINPUT7 = 1; epwmRegs[mod]->AQCTLA.bit.CAU= 2; epwmRegs[mod]->AQCTLA.bit.ZRO= 1; epwmRegs[mod]->DCACTL.bit.EVT2SRCSEL = 0; epwmRegs[mod]->DCACTL.bit.EVT2FRCSYNCSEL = 1; epwmRegs[mod]->TZDCSEL.bit.DCBEVT1=3; //001: DCAH = low, DCAL = don't care epwmRegs[mod]->DCTRIPSEL.bit.DCBLCOMPSEL=0xF; epwmRegs[mod]->DCBLTRIPSEL.bit.TRIPINPUT8 = 1; epwmRegs[mod]->AQCTLB.bit.CBU= 1; epwmRegs[mod]->AQCTLB.bit.ZRO= 1; epwmRegs[mod]->DCBCTL.bit.EVT1SRCSEL = 0; epwmRegs[mod]->DCBCTL.bit.EVT1FRCSYNCSEL = 1; CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1; XBAR_setEPWMMuxConfig(XBAR_TRIP7 ,XBAR_EPWM_MUX04_CMPSS3_CTRIPH); XBAR_setEPWMMuxConfig(XBAR_TRIP8 ,XBAR_EPWM_MUX05_CMPSS3_CTRIPL); XBAR_enableEPWMMux(XBAR_TRIP7, XBAR_MUX04); XBAR_enableEPWMMux(XBAR_TRIP8, XBAR_MUX05); epwmRegs[mod]->TZCLR.bit.CBC = 1; epwmRegs[mod]->TZCLR.bit.INT = 1; epwmRegs[mod]->TZEINT.bit.CBC = 1; epwmRegs[mod]->TBCTL.bit.CTRMODE =TB_COUNT_UPDOWN; CORE_Edisext(); CMPSS_configHighComparator(CMPSS3_BASE, CMPSS_INSRC_DAC); CMPSS_configLowComparator(CMPSS3_BASE, CmpssConfig); CMPSS_setDACValueHigh(CMPSS3_BASE,cmpss_Lvalue); CMPSS_setDACValueLow(CMPSS3_BASE, cmpss_Hvalue); CMPSS_setHysteresis(CMPSS3_BASE,hysteresis); CMPSS_enableModule(CMPSS3_BASE); EPWM_Start(mod); }
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