Ok i have changed the pins from port 2 mapped to port 8. The slave address is 48 which should be correct. twice since the change in pins i have gotten that result you see on the logic analyzer but most of the time the sda line goes low or stays low. I have tried looking at individual registers and going through the code as well as change small things such as while (UCB1CTL1 & UCTXSTT); which the code sometimes cant make it past so iv commented it out on several tries as well as the // while ((UCB1IFG & UCTXIFG)); under the buffer. The UCTR has been set before the SW reset and SMCLK as well as at the same time and iv tried setting the UCTR with the start condition. I have also tried to make countless small changes to see if it would help to no avail. changing to pins p8.5 and p8.6 has been slightly more promising as iv got it to send a start condition 48h and a stop condition (this has only happened a few times so far) but i did not get an ack back. the chip im talking to works fine as well with a different micro-controller so it shouldn't be faulty.
#include <msp430.h>
//void Port_Mapping(void);
unsigned char *PTxData; // Pointer to TX data
unsigned char TXByteCtr;
const unsigned char TxData[] = // Table of data to transmit
{
0x00,
0x00,
0xFF,
0x02,
0xFE,
0xD4,
0x02,
0x2A
};
int main(void)
{
unsigned int i;
// int r = 1;
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
//Port_Mapping();
P1SEL = 0;
// P1SEL2 = 0;
P1DIR = 0xFF;
P1OUT = 0x01;
// P1OUT = 0x00;
//for(i=0;i<10;i++); // Delay required between transaction
// P2OUT = 0x03;
// P2OUT = 0x00;
// P2OUT = 0x03;
// P1OUT = 0x01;
P8SEL |= 0x60; // Assign P8.5 to UCB1SDA and...
P8DIR |= 0x60; // P8.6 to UCB1SCL
UCB1CTL1 |= UCSWRST; // Enable SW reset
UCB1CTL0 = UCMST | UCMODE_3 | UCSYNC; // I2C Master, synchronous mode
//UCB0CTL1 |= UCTR;
UCB1CTL1 = UCTR | UCSSEL_2 | UCSWRST; // Use SMCLK, keep SW reset
UCB1BR0 = 12; // fSCL = SMCLK/12 = ~100kHz
UCB1BR1 = 0;
UCB1I2CSA = 0x48; // Slave Address is 048h
UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
for(i=0;i<10;i++); // Delay required between transaction
PTxData = (unsigned char *)TxData; // TX array start address
// Place breakpoint here to see each
// transmit operation.
TXByteCtr = sizeof TxData; // Load TX byte counter
UCB1CTL1 |= UCTXSTT; // I2C TX, start condition
while (UCB1CTL1 & UCTXSTT);
while (TXByteCtr)
{
UCB1TXBUF = *PTxData++; // Load TX buffer
// while ((UCB1IFG & UCTXIFG));
TXByteCtr--; // Decrement TX byte counter
//for(i=0;i<10;i++);
}
UCB1CTL1 |= UCTXSTP; // I2C stop condition
UCB1IFG &= ~UCTXIFG; // Clear USCI_B1 TX int flag
while (UCB1CTL1 & UCTXSTP); // Ensure stop condition got sent
//__bic_SR_register_on_exit(LPM0_bits); // Exit LPM0
__no_operation(); // Remain in LPM0 until all data
}
these o'scope captures where from when it sent the slaves address successfully and did not get a ack back.
this is the closest thing to working however its only got this far a couple of times.