Hello Charles, Thanks a lot for the help to run the test to show that it is able to halt the processor when ROM code is running. Do you see issues if we do: 1) Halt the processor 2) Issue mass erase to erase tm4c flash 3) Program tm4c flash via JTAG 4) Release the processor from Halt state. I think this might be able to prevent tm4c from trying Ethernet boot during the JTAG programming time. Any concerns you see from this proposal? [quote userid="542779" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1495866/tm4c129encpdt-jtag-programming-tm4c-failed-with-corrupted-flash-image/5760276#5760276"]I also tried to leverage the halt register bit to halt the MCU before issuing JTAG mass erase, but it doesn't seem to help. When the ROM bootloader is running, can the halt bit successfully halt the MCU? [/quote] I missed one extra register bit besides the halt bit. After adding that debug enable bit, it seems this approach might work based on my limited testing. But I would like to know whether there is any risk here that I might have missed about this proposal. Thanks, Hong
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