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Forum Post: RE: TMS320F28377D: I would like to know the exact timing of the Shadow-to-Active load operation for the compare register.

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Hello, For Gen3 devices such as TMS320F28377D, it would almost always be case 1. The only time it would not be case 1 is if you write CMPA to zero value in ISR during or close to zero TB counter value. In that case, action qualifier would execute later like in Case 2. When it comes to timing, CMPA shadow to active would happen on TBCTR = 0 and at the end of that TBCLK period, AQCTL would execute with up-to date CMPA value which is zero leading to Case 1. Best regards, Stevan D.

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