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Forum Post: RE: MSPM0G3507: Question about MSPM0 timer CCP synchronizer

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Hi James, [quote userid="637524" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1478836/mspm0g3507-question-about-mspm0-timer-ccp-synchronizer"]But 27-14, CCP input go HIGH after 0.3 cycle after the TIMCLK rising edge, so Synchronizer not sure of CCP input is HIGH(because signal is less than 1 cycle),[/quote] As mentioned in TRM, I think you are correct. While from my perspective, my understanding is below: As the digital circuit is always driven by the clock, more specifically, driven by the edge. So, it need wait the next clock edge to capture the input signal. [quote userid="637524" url="~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1478836/mspm0g3507-question-about-mspm0-timer-ccp-synchronizer"]2. Is there way to change amount of cycle for input detecting in synchronizer?[/quote] No. I don't find any configuration. B.R. Sal

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