Zhaohong,
We are not performing an operation on the sci while interrupt is disabled. We are accessing the queue directly and want to make sure the ISR is not updating the queue at the same time.
I don't think we want to clear the SCI interrupt in the VIM. What we are seeing is the ISR is entered immediately after the interrupt is disabled in the sci. The phantom interrupt occurs first with the RXRDY bit set. When the interrupt is re-enabled, the ISR is entered again and the data is correctly processed. This only happens now because we removed the following line from the ISR default case:
sciREG->FLR = sciREG->SETINTLVL & 0x07000303U;
This line seemed to clear out the real pending interrupt and result in data loss.
This line is also confusing because the structures of the FLR and the SETINTLVL registers are not the same. The mask corresponds to the SETINTLVL register.
Thanks, Charlie