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Forum Post: RE: TM4C1294NCPDT: TM4C1294NPDT: I2C master-slave machine experiences SDA pull low abnormality, and cannot be used normally in the future

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Hi, I think the problem is that both the master and the slave lose synchronization to each other. When you artificially create noise onto the bus, it may have created extra clock edge to the slave. In this case, the slave thinks that it has received N+1 clocks while the master has only sent out N clocks. This loss of synchronization is normally not recoverable by issuing a reset on the master side because the master has no idea that the slave has mistakenly received more clocks than it has sent out. You could reset both the master and the slave devices, not just one of them. Another solution is to use SCL as a digital I/O and bit-bang it low/high until the slave releases SDA. Here is some information on I2C that you may find helpful. Also Check the SCL and SDA lines. If the slave is holding SDA low, the only way to get the slave out of this state is with edges on SCL. Since the I2C module sees this as a different master holding the bus, it will not attempt to drive SCL. Bit banging is the only solution I know. Resetting the module, or time-out of the master does not change the state of the slave. https://www.ti.com/lit/an/slva704/slva704.pdf https://www.ti.com/lit/an/slyt770/slyt770.pdf

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