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Forum Post: RE: TMS320F28335: Setting the TBPRD EPWM value by sending it serially through my python code.

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Hi Allison, Thanks for your reply. [quote userid="503126" url="~/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1409945/tms320f28335-setting-the-tbprd-epwm-value-by-sending-it-serially-through-my-python-code"]The purpose is to receive the values (from Python code though TransmitBytes) in DSP via serial and then make it equal to TPWM(TBPRD) for setting the ePWMs frequencies but it is not working[/quote] The very first error I have is in the Problem window . First, I need to fix this error, then I can check or investigate the Registers (SCIA registers) and realize whether I can receive data or not. Please see the picture of the Error window. Code: #include "DSP2833x_Device.h" #include // external function prototypes extern void InitSysCtrl(void); extern void InitPieCtrl(void); extern void InitPieVectTable(void); extern void InitCpuTimers(void); extern void ConfigCpuTimer(struct CPUTIMER_VARS *, float, float); // Prototype statements for functions found within this file. void Gpio_select(void); void Setup_ePWM1(void); void SCIA_init(void); interrupt void SCIA_RX_isr(void); // SCI-A Receive Interrupt Service void Setup_ePWM2(void); //void Setup_eCAP1(void); interrupt void cpu_timer0_isr(void); //interrupt void eCAP1_isr(void); // Global Variables //Uint32 PWM_Duty = 0; //Uint32 PWM_Period = 0; //Uint32 PWM2_Duty; //Uint32 PWM2_Period; //Uint32 NEW_Duty = 0; //Uint32 NEW_Period = 0; double TPWM; //1500(100K) //########################################################################### // main code //########################################################################### void main(void) { int counter=0; // binary counter for digital output InitSysCtrl(); // Basic Core Init from DSP2833x_SysCtrl.c EALLOW; SysCtrlRegs.WDCR= 0x00AF; // Re-enable the watchdog EDIS; // 0x00AF to NOT disable the Watchdog, Prescaler = 64 DINT; // Disable all interrupts Gpio_select(); // GPIO9, GPIO11, GPIO34 and GPIO49 as output // to 4 LEDs at Peripheral Explorer Board SCIA_init(); // Initalize SCI Setup_ePWM1(); // init ePWM1A,B Setup_ePWM2(); // init ePWM2A,B InitPieCtrl(); // basic setup of PIE table; from DSP2833x_PieCtrl.c InitPieVectTable(); // default ISR's in PIE EALLOW; PieVectTable.TINT0 = &cpu_timer0_isr; // PieVectTable.ECAP1_INT= &eCAP1_isr; PieVectTable.SCIRXINTA = &SCIA_RX_isr; EDIS; InitCpuTimers(); // basic setup CPU Timer0, 1 and 2 ConfigCpuTimer(&CpuTimer0,150,100000); PieCtrlRegs.PIEIER1.bit.INTx7 = 1; // Enable CPU Timer 0 INT PieCtrlRegs.PIEIER4.bit.INTx1 = 1; // Enable ECAP1_INT in PIE group 4 IER |= 0x0009; EINT; ERTM; CpuTimer0Regs.TCR.bit.TSS = 0; // start timer0 while(1) { while(CpuTimer0.InterruptCount == 0); CpuTimer0.InterruptCount = 0; EALLOW; SysCtrlRegs.WDKEY = 0x55; // service WD #1 EDIS; counter++; if(counter&1) GpioDataRegs.GPASET.bit.GPIO9 = 1; else GpioDataRegs.GPACLEAR.bit.GPIO9 = 1; if(counter&2) GpioDataRegs.GPASET.bit.GPIO11 = 1; else GpioDataRegs.GPACLEAR.bit.GPIO11 = 1; if(counter&4) GpioDataRegs.GPBSET.bit.GPIO34 = 1; else GpioDataRegs.GPBCLEAR.bit.GPIO34 = 1; if(counter&8) GpioDataRegs.GPBSET.bit.GPIO49 = 1; else GpioDataRegs.GPBCLEAR.bit.GPIO49 = 1; } } void Gpio_select(void) { EALLOW; GpioCtrlRegs.GPAMUX1.all = 0; // GPIO15 ... GPIO0 = General Puropse I/O GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0; GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0; GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // ePWM1A active GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // ePWM1B active GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0; GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0; GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // ePWM2A active GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // ePWM2B active GpioCtrlRegs.GPAMUX2.all = 0; // GPIO31 ... GPIO16 = General Purpose I/O GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1; // SCIRXDA // GpioCtrlRegs.GPAPUD.bit.GPIO24= 0; // GpioCtrlRegs.GPAMUX2.bit.GPIO24= 1; // eCAP1 active GpioCtrlRegs.GPBMUX1.all = 0; // GPIO47 ... GPIO32 = General Purpose I/O GpioCtrlRegs.GPBMUX2.all = 0; // GPIO63 ... GPIO48 = General Purpose I/O GpioCtrlRegs.GPCMUX1.all = 0; // GPIO79 ... GPIO64 = General Purpose I/O GpioCtrlRegs.GPCMUX2.all = 0; // GPIO87 ... GPIO80 = General Purpose I/O GpioCtrlRegs.GPADIR.all = 0; GpioCtrlRegs.GPADIR.bit.GPIO9 = 1; // peripheral explorer: LED LD1 at GPIO9 GpioCtrlRegs.GPADIR.bit.GPIO11 = 1; // peripheral explorer: LED LD2 at GPIO11 GpioCtrlRegs.GPBDIR.all = 0; // GPIO63-32 as inputs GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1; // peripheral explorer: LED LD3 at GPIO34 GpioCtrlRegs.GPBDIR.bit.GPIO49 = 1; // peripheral explorer: LED LD4 at GPIO49 GpioCtrlRegs.GPCDIR.all = 0; // GPIO87-64 as inputs EDIS; } interrupt void cpu_timer0_isr(void) { CpuTimer0.InterruptCount++; EALLOW; SysCtrlRegs.WDKEY = 0xAA; // service WD #2 EDIS; PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; } void SCIA_init() { SciaRegs.SCICCR.all =0x0027; // 1 stop bit, No loopback // ODD parity,8 char bits, // async mode, idle-line protocol SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK, // Disable RX ERR, SLEEP, TXWAKE // SYSCLOCKOUT = 150MHz; LSPCLK = 1/4 = 37.5 MHz // BRR = (LSPCLK / (9600 x 8)) -1 // BRR = 487 gives 9605 Baud SciaRegs.SCIHBAUD = 487 >> 8; // Highbyte SciaRegs.SCILBAUD = 487 & 0x00FF; // Lowbyte SciaRegs.SCICTL2.bit.RXBKINTENA = 1; // enable SCI_A Rx-ISR SciaRegs.SCIFFCT.all = 0x0000; // Set FIFO transfer delay to 0 SciaRegs.SCIFFRX.all = 0xE065; // Rx interrupt level = 5 SciaRegs.SCICTL1.all = 0x0023; // Relinquish SCI from Reset } // SCI-A Receive Interrupt Service interrupt void SCIA_RX_isr(void) { int i; char buffer[16]; for (i=0;i<16;i++) buffer[i]= SciaRegs.SCIRXBUF.bit.RXDT; int double TPWM = buffer[i]; SciaRegs.SCIFFRX.bit.RXFIFORESET = 0; // reset RX-FIFO pointer SciaRegs.SCIFFRX.bit.RXFIFORESET = 1; // enable RX-operation SciaRegs.SCIFFRX.bit.RXFFINTCLR = 1; // clear RX-FIFO INT Flag PieCtrlRegs.PIEACK.all = PIEACK_GROUP9; } void Setup_ePWM1(void) { EPwm1Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1 EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 2 EPwm1Regs.TBCTL.bit.CTRMODE = 2; // up - down mode EPwm1Regs.AQCTLA.all = 0x0060; // set ePWM1A on CMPA up, clear ePWM1A on CMPA down EPwm1Regs.AQCTLB.all = 0x0600; // set ePWM1B on CMPB up, clear ePWM1B on CMPB down EPwm1Regs.TBPRD = TPWM; // 1KHz - PWM signal //1500(100K),1250(120K),1666(90K),1154(130K),1364(110K) EPwm1Regs.CMPA.half.CMPA = TPWM/2; // 50% duty cycle first EPwm1Regs.CMPB = TPWM/2; EPwm1Regs.DBRED = 55; // 10 microseconds delay EPwm1Regs.DBFED = 55; // for rising and falling edge EPwm1Regs.DBCTL.bit.OUT_MODE = 3; // ePWM1A = RED EPwm1Regs.DBCTL.bit.POLSEL = 2; // S3=1 inverted signal at ePWM1B EPwm1Regs.DBCTL.bit.IN_MODE = 0; // ePWM1A = source for RED & FED } void Setup_ePWM2(void) { EPwm2Regs.TBCTL.bit.CLKDIV = 0; // CLKDIV = 1 EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0; // HSPCLKDIV = 2 EPwm2Regs.TBCTL.bit.CTRMODE = 2; // up - down mode EPwm2Regs.AQCTLA.all = 0x0060; // set ePWM1A on CMPA up, clear ePWM1A on CMPA down EPwm2Regs.AQCTLB.all = 0x0600; // set ePWM1B on CMPB up, clear ePWM1B on CMPB down EPwm2Regs.TBPRD = TPWM; // 1KHz - PWM signal //1500(100K),1250(120K),1666(90K),1154(130K),1364(110K) EPwm2Regs.CMPA.half.CMPA = TPWM/2; // 50% duty cycle first EPwm2Regs.CMPB = TPWM/2; EPwm1Regs.TBCTL.bit.SYNCOSEL = 1; // generate a syncout if CTR = 0 EPwm2Regs.TBCTL.bit.PHSEN = 1; // enable phase shift for ePWM2 EPwm2Regs.TBCTL.bit.SYNCOSEL = 0; // syncin = syncout EPwm2Regs.TBPHS.half.TBPHS = TPWM; // 1/3 phase shift EPwm2Regs.DBRED = 55; // 10 microseconds delay EPwm2Regs.DBFED = 55; // for rising and falling edge EPwm2Regs.DBCTL.bit.OUT_MODE = 3; // ePWM1A = RED EPwm2Regs.DBCTL.bit.POLSEL = 2; // S3=1 inverted signal at ePWM1B EPwm2Regs.DBCTL.bit.IN_MODE = 0; // ePWM1A = source for RED & FED } //=========================================================================== // End of SourceCode. //=========================================================================== Please suggest accordingly Kind Regards Arsalan

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