[quote userid="485554" url="~/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1356624/tms320f28379d-code-execution-after-dcsm-implementation/5177567#5177567"]It appears that CPU1 doesn't get through the IPC CPU boot check, probably because cpu2 never boots? Both bootctrl is 0x0B5A in OTP, might this be a problem?[/quote] I think this is the issue. If you have set the BOOT configuration in OTP then there will be no IPC handshake with CPU1 and CPU2 will directly boot to flash. Please refer "Figure 4-7. CPU2 Standalone and Hibernate Boot Flow" in device TRM. Vivek Singh
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