Hi Jan, By default (see SHDWAMODE and SHDWBMODE bits in CMPCTL register), the writes to the CMPA and CMPB are first buffered which means the values written to CMPA and CMPB are first stored in the respective shadow registers. In the CMPCTL register you can configure the LOADAMODE and LOADBMODE bits to load the the active the CMPA and CMPB from their shadow registers when certain condition is true. For example, you can configure both LOADAMODE and LOADBMODE the same to transfer the shadow register values to the active CMPA and CMPB when the counter reaches the preload value or when the counter reaches zero. Let me know if this will solve your problem.
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