I have studied this further and have convinced myself this is a bug in the MSP-GANG.
After capturing and decoding a BSL session on a DSO, I can see:
1) BSL is used to write,verify and execute the FBSL... ok
2) FBSL is used to write a magic value to TARGET RAM and read it back... ok
3) FBSL is used to set the DCOCTL and BCSCTL1 registers
at this point, the TARGET MSP430F2131 runs too fast and irretreivably loses sync with the programmer.
The FBSL has initial settings of BCSCTL1=0x8B and DCOCTL=0x00.
The latter settings are BCSCTL1=0x8C and DCOCTL=0x99.
For reference, the chip cal constants are:
BCSCTL1=0x86 and DCOCTL=0xBB. (1MHz)
BCSCTL1=0x8D and DCOCTL=0x7D. (8Mhz)
BCSCTL1=0x8E and DCOCTL=0x91. (12MHz)
BCSCTL1=0x8F and DCOCTL=0x80 (16MHz)
I was running 1.1.0 GUI code at the time but have no reason to believe later code would behave any differently.
Hope this helps,
Sean.