Hi Jean-Mark,
As you can see in my post showing a debug listing, SPI1 slave is perfectly triggered by SC5 line configured for TG0. CS5 was decoded in the status register (0x1F).
Regards, Dmitri.
Hi Jean-Mark,
As you can see in my post showing a debug listing, SPI1 slave is perfectly triggered by SC5 line configured for TG0. CS5 was decoded in the status register (0x1F).
Regards, Dmitri.