Hello,
We are using the RM48L950 for our project, and we have it set up to use the I2C to read/write to an external memory chip (serial eeprom). To read/write a block of data, the DMA is used to move the data between the tightly coupled memory (TCM) RAM and the I2C DRR/DXR registers.
In most cases the transfer starts and completes as expected, but approximately every 1 out of 200 tries the DMA will fail to move the data from internal memory to the I2C DXR registers (we ran a long term test and found 538 failures out of 106820 attempts to transfer data). The setup sequence is the same each time so this result is confusing. Please see below for the setup sequence I have configured it for.
I setup the transfer in this sequence:
dmaREG->GCHIENAS |= 0x100;
dmaREG->BTCINTENAS |= 0x100;
i2cREG1->DMAC |= 0x2;
....dma transfer starts... once it is done...
i2cREG1->DMAC &= 0xFFFFFFFD;
dmaREG->GCHIENAR |= 0x100;
dmaREG->BTCINTENAR |= 0x100;
I wonder if anyone or TI has had similar problem, and what possible solution might be.
Thanks,
Clio