Forum Post: RE: MSP430FR2533: ADC register ADCSC and ADCBUSY bits remain set after initial ADC interrupt

CPU @ 8 MHz void updateADCReg(void) { if (!doNotDisturb) { interruptFlagReg |= (1 << SS_REG_INT_FLAG_ADC); // Clear the interrupt flag HWREG16(FUNCTIONTIMER__PERIPHERAL + OFS_TAxCCTL2) &= ~(COV | CCIFG); //set rollover to be 100ms from current timer val (actually more like 45-55ms) HWREG16(FUNCTIONTIMER__PERIPHERAL + OFS_TAxCCR2) = HWREG16(FUNCTIONTIMER__PERIPHERAL + OFS_TAxR) + TIMER_CYCLES_100MS; //enable timer HWREG16(FUNCTIONTIMER__PERIPHERAL + OFS_TAxCCTL2) |= CCIE; // Set the interrupt for the QCC to high (and set the direction to out. P1DIR |= GPIO_PIN5; P1OUT |= GPIO_PIN5; } }