I thought that was the original idea -- trigger only on HIIFG, and capture the MEM register when it triggers. With "fast as possible" mode, these interrupts will be coming very fast when the signal is "high", but not at all when the signal is "low" or "middle". (You'll need some criterion to decide when the pulse has passed.) What is your code doing now? This isn't the most graceful way to do this, but it should get you some initial results without going down too many rabbit-holes. Possible future improvements (not mutually exclusive): 1) DMA. I'm pretty sure there's an Example that uses DMA with the ADC, but I've never had occasion to use DMA with the Window Comparator. 2) A timer trigger with the timer tuned to maximize the sample rate without overrunning. 3) Speed up the CPU clock so you can do more capture and analysis. I'm pretty sure there is at least one Example that does this.
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