Hello, This can be derived from the MibADC Timing Specifications table in the datasheet : The minimum sample and hold time + conversion time in 12-bit mode = 600ns. Therefore, the theoretical maximum sampling rate = 1/600ns = 1.66 MSPS Please note this does not account for the delay between conversions (~4 V CLK cycles), the time for values to latch, and other delays in the ADC module. This also assumes using the minimum sample and hold time which you may want to increase depending on how low impedance your external circuitry is. Hope this helps.
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