Forum Post: RE: MSP432E401Y: QSSI missing frame sync timing information and compatibility with McBSP

Sai, My apologies for the delay in getting back with you: For some reason, I did not receive notification of your response! In our use case, the Delfino's BSP will be the master sending data to the MSP432. We therefore have the Delfino's BSP configured to generate the frame sync (as well as clock and data). The Delfino's data sheet specifies the frame sync timing relative to its clock (and data) but the MSP432's data sheet only shows the frame sync pictorially which raised my original query. We need a mode of operation for the MSP432's QSSI to receive data from the McBSP significantly faster than the specified 10Mbps of the legacy mode ( we need a minimum of 24Mbps, but we prefer 50). Given our requirements, the legacy mode does not seem to work. Or maybe I am missing something? It is confusing as to how a synchronous serial port could be limited by such a high clock-to-bit-reception-ratio (which smells much more like an asynchronous receiver) so that it can only receive at 1/6th its max transmission rate?! I did read the possibility of setting up synchronous transfers with gated clocks and NO frame sync. This is not something I typically do....I prefer a continuous clock and frame the data with a frame sync. But if there is no way to have the McBsp and QSSI communicate at high speed using all three lines (clock, data, and frame sync), maybe we can do it with two lines by having the clock be gated?? Would it help if I sent the initialization section of our code? Your help is much appreciated! Thanks again for your response. Mike